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    54LS10 Search Results

    54LS10 Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    54LS107A/BCA Rochester Electronics LLC 54LS107A - FLIP-FLOP, JK, DUAL - Dual marked (M38510/30108BCA) Visit Rochester Electronics LLC Buy
    SN54LS107J Rochester Electronics LLC J-K Flip-Flop Visit Rochester Electronics LLC Buy
    SNJ54LS10FK Texas Instruments Triple 3-Input Positive-NAND Gates 20-LCCC -55 to 125 Visit Texas Instruments Buy
    SNJ54LS109AJ Texas Instruments Dual J-K Positive-Edge-Triggered Flip-Flops With Preset And Clear 16-CDIP -55 to 125 Visit Texas Instruments Buy
    SN54LS10J Texas Instruments Triple 3-Input Positive-NAND Gates 14-CDIP -55 to 125 Visit Texas Instruments
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    54LS10 Price and Stock

    Rochester Electronics LLC 54LS107A-BCA

    DUAL MARKED (M38510/30108BCA)
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    DigiKey 54LS107A-BCA Bulk 1,482 4
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    Rochester Electronics LLC SN54LS107J

    J-K FLIP-FLOP
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    DigiKey SN54LS107J Bulk 234 6
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    Rochester Electronics SN54LS107J 234 1
    • 1 $60.32
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    • 100 $56.7
    • 1000 $51.27
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    Rochester Electronics LLC SNJ54LS109AJ

    54LS109A DUAL J-K POSITIVE-EDGE-
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    DigiKey SNJ54LS109AJ Bulk 191 30
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    • 100 $10.33
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    Rochester Electronics LLC SN54LS109AJ

    54LS109A DUAL J-K POSITIVE-EDGE-
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    DigiKey SN54LS109AJ Bulk 137 30
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    Rochester Electronics LLC SNJ54LS10FK

    IC TRPL 3-INP
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    DigiKey SNJ54LS10FK Bulk 131 21
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    Find more 54LS10 price and stock on Findchips.com

    54LS10 Datasheets (52)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    54LS10 National Semiconductor Triple 3-Input NAND Gates Original PDF
    54LS10 Fairchild Semiconductor Full Line Condensed Catalogue 1977 Scan PDF
    54LS10 Raytheon Positive-NAND Gates, Hex Inverters Scan PDF
    54LS107 Fairchild Semiconductor Full Line Condensed Catalogue 1977 Scan PDF
    54LS107 Raytheon Dual J-K Negative-Edge-Triggered Flip-Flops Scan PDF
    54LS107A/BCAJC Unknown Historical semiconductor price guide (US$ - 1998). From our catalog scanning project. Historical PDF
    54LS107A/BDAJC Unknown Historical semiconductor price guide (US$ - 1998). From our catalog scanning project. Historical PDF
    54LS107AM/B2AJC Unknown Historical semiconductor price guide (US$ - 1998). From our catalog scanning project. Historical PDF
    54LS107DM Fairchild Semiconductor Dual J-K Flip-Flop Scan PDF
    54LS107FM Fairchild Semiconductor Dual J-K Flip-Flop Scan PDF
    54LS107J/883 Unknown Historical semiconductor price guide (US$ - 1998). From our catalog scanning project. Historical PDF
    54LS109 National Semiconductor Dual Positive-Edge-Triggered J-K Flip-Flops with Preset, Clear, and Complementary Outputs Original PDF
    54LS109 Fairchild Semiconductor Full Line Condensed Catalogue 1977 Scan PDF
    54LS109 Raytheon Dual J-K Posilive-Edge-Triggered Flip-Flop Scan PDF
    54LS109A/BEAJC Unknown Historical semiconductor price guide (US$ - 1998). From our catalog scanning project. Historical PDF
    54LS109A/BFAJC Unknown Historical semiconductor price guide (US$ - 1998). From our catalog scanning project. Historical PDF
    54LS109AM/B2AJC Unknown Historical semiconductor price guide (US$ - 1998). From our catalog scanning project. Historical PDF
    54LS109DM Fairchild Semiconductor Dual JK Positive Edge Triggered Flip-Flop Scan PDF
    54LS109DM Unknown Historical semiconductor price guide (US$ - 1998). From our catalog scanning project. Historical PDF
    54LS109DMQB National Semiconductor Dual Positive-Edge-Triggered J-Inverted K Flip-Flop with Preset, Clear, and Complementary Outputs Original PDF

    54LS10 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    74LS10

    Abstract: DM74LS10 DM74LS10N 54LS10 54LS10DMQB 54LS10FMQB 54LS10LMQB DM54LS10J DM54LS10W DM74LS10M
    Text: DM74LS10 Triple 3-Input NAND Gates General Description This device contains three independent gates each of which performs the logic NAND function. Features n Alternate Military/Aerospace device 54LS10 is available. Contact a Fairchild Semiconductor Sales


    Original     		PDF DM74LS10 54LS10) DS006349-1 54LS10DMQB, 54LS10FMQB, 54LS10LMQB, DM54LS10J, DM54LS10W, DM74LS10M DM74LS10N 74LS10 DM74LS10 DM74LS10N 54LS10 54LS10DMQB 54LS10FMQB 54LS10LMQB DM54LS10J DM54LS10W

    Untitled

    Abstract: No abstract text available
    Text: 54LS10,54LS10,DM74LS10 54LS10 54LS10 DM74LS10 Triple 3-Input NAND Gates Literature Number: SNOS277A 54LS10 54LS10 DM74LS10 Triple 3-Input NAND Gates General Description Features This device contains three independent gates each of which performs the logic NAND function


    Original     		PDF 54LS10 DM54LS10 DM74LS10 DM74LS10 SNOS277A

    Untitled

    Abstract: No abstract text available
    Text: 54LS109,54LS109A,DM74LS109A 54LS109 54LS109A DM74LS109A Dual Positive-Edge-Triggered J- Flip-Flops with Preset, Clear, and Complementary Outputs Literature Number: SNOS278A 54LS109 54LS109A DM74LS109A Dual Positive-Edge-Triggered J-K Flip-Flops with Preset Clear and Complementary Outputs


    Original     		PDF 54LS109 DM54LS109A DM74LS109A DM74LS109A SNOS278A

    54LS10

    Abstract: DM74LS10 54LS10DMQB 54LS10FMQB 54LS10LMQB DM54LS10 DM54LS10J DM54LS10W DM74LS10M DM74LS10N
    Text: 54LS10 54LS10 DM74LS10 Triple 3-Input NAND Gates General Description Features This device contains three independent gates each of which performs the logic NAND function Y Alternate Military Aerospace device 54LS10 is available Contact a National Semiconductor Sales Office


    Original     		PDF 54LS10 DM54LS10 DM74LS10 54LS10) 54LS10DMQB 54LS10FMQB 54LS10LMQB DM54LS10J DM54LS10W DM74LS10M DM74LS10 54LS10LMQB DM74LS10N

    54LS109

    Abstract: 54LS109DMQB 54LS109FMQB DM54LS109A DM54LS109AJ DM54LS109AW DM74LS109A DM74LS109AM DM74LS109AN J16A
    Text: 54LS109 54LS109A DM74LS109A Dual Positive-Edge-Triggered J-K Flip-Flops with Preset Clear and Complementary Outputs General Description This device contains two independent positive-edge-triggered J-K flip-flops with complementary outputs The J and K data is accepted by the flip-flop on the rising edge of the


    Original     		PDF 54LS109 DM54LS109A DM74LS109A 54LS109DMQB 54LS109FMQB DM54LS109AJ DM54LS109AW DM74LS109A DM74LS109AM DM74LS109AN J16A

    Untitled

    Abstract: No abstract text available
    Text: Z9A National SLA Semiconductor 54LS109/54LS109A/DM74LSJI09A Dual Positive-Edge-Triggered J-K Flip-Flops with Preset, Clear, and Complementary Outputs General Description This device contains two independent positive-edge-triggered J-K flip-flops with complementary outputs. The J and


    OCR Scan     		PDF 54LS109/DM54LS109A/DM74LSJI09A

    AS11JAN

    Abstract: No abstract text available
    Text: M M O T O R O L A M ilitary 54LS10 Triple 3-Input Positive IUAND Gate ELECTRICALLY TESTED PER: MIL-M-38510/30005 AVAILABLE AS: 11 JAN: JM38510/30005BXA 2) SMD: * 3) 883C . 54LS10/BXAJC LOGIC DIAGRAM Vcc Cl Y1 M ra f i C3 B3 it I > f Al A3 Y3 X = CASE OUTLINE AS FOLLOWS:


    OCR Scan     		PDF 54LS10 MIL-M-38510/30005 JM38510/30005BXA 54LS10/BXAJC AS11JAN

    Untitled

    Abstract: No abstract text available
    Text: LS109A National Semiconductor 54LS109/54LS109A/DM74LSJ09A Dual Positive-Edge-Triggered J-K Flip-Flops with Preset, Clear, and Complementary Outputs General Description This device contains two independent positive-edge-trig­ gered J-K flip-flops with complementary outputs. The J and


    OCR Scan     		PDF 54LS109/DM54LS109A/DM74LSJ09A

    54ls10

    Abstract: No abstract text available
    Text: Signetics I 54LS10, 54S10, 54S11 Gates Triple Three-Input NAND ’10 , AND (’11) Gates Military Logic Products H FUNCTION TABLE ORDERING INFORMATION INPUTS Product Specification DESCRIPTION OUTPUTS A B C Y(’10) Y('11) L L L L H H H H L L H H L L H H L


    OCR Scan     		PDF 54LS10, 54S10, 54S11 54LS10/BCA, 54S10/BCA, 54S11/BCA 54LS10/BDA, 54S10/BDA, 54S11/BDA 54LS10/B2A 54ls10

    Untitled

    Abstract: No abstract text available
    Text: June 1989 54LS109/54LS109A/DM74LSJ109A Dual Positive-Edge-Triggered J-K Flip-Flops with Preset, Clear, and Complementary Outputs General Description This device contains two independent positive-edge-trig­ gered J-K flip-flops with complementary outputs. The J and


    OCR Scan     		PDF 54LS109/DM54LS109A/DM74LSJ109A

    DM74LS10N

    Abstract: 54LS10 54LS10LMQB DM54LS10J DM54LS10W DM74LS10M E20A
    Text: , June 1989 54LS10/54LS10/DM74LS10 Triple 3-Input NAND Gates General Description Features This device contains three independent gates each of which performs the logic NAND function. • Alternate Military/Aerospace device 54LS10 is available. Contact a National Semiconductor Sales Office/


    OCR Scan     		PDF 54LS10/DM54LS10/DM74LS10 54LS10) TL/F/6349-1 54LS1ODMQB, 54LS1OFMQB, 54LS10LMQB, DM54LS10J, DM54LS10W, DM74LS10M DM74LS10N 54LS10 54LS10LMQB DM54LS10J DM54LS10W E20A

    Untitled

    Abstract: No abstract text available
    Text: June 1989 Semiconductor 54LS10/54LS10/DM74LS10 Triple 3-Input NAND Gates General Description Features This device contains three independent gates each of which performs the logic NAND function. • Alternate Military/Aerospace device 54LS10 is available. Contact a National Semiconductor Sales Office/


    OCR Scan     		PDF 54LS10/DM54LS10/DM74LS10 54LS10) 54LS10DMQB, 54LS10FMQB, 54LS10LMQB, DM54LS10J, DM54LS10W, DM74LS10M DM74LS10N

    Untitled

    Abstract: No abstract text available
    Text: Signetics 54LS109 Flip-Flop Dual J-K Positive Edge-Triggered Flip-Flop Product Specification Military Logic Products DESCRIPTION Th e 5 4 L S 1 09 is a dual positive edge-trig­ gered JR-type flip-flop featuring individual J, K, Clock, S et and R eset inputs; also


    OCR Scan     		PDF 54LS109 54LSXXX 500ns 1N916 1N3064,

    Untitled

    Abstract: No abstract text available
    Text: LS10 £ 2 National Semiconductor 54LS10/54LS10/DM74LS10 Triple 3-lnput NAND Gates General Description Features This device contains three independent gates each of which performs the logic NAND function. • Alternate Military/Aerospace device 54LS10 is avaiiable. Contact a National Semiconductor Sales Office/


    OCR Scan     		PDF 54LS10/DM54LS10/DM74LS10 54LS10) 54LS10DMQB, 54LS10FMQB, 54LS10LMQB, DM54LS10J, DM54LS10W, DM74LS10M DM74LS10N

    Untitled

    Abstract: No abstract text available
    Text: M M ilita ry 54L S 10 M O T O R O L A Triple 3-In pu t P ositive NAND G ate MP0 HUM ELECTRICALLY TESTED PER: MIL-M-38510/30005 LOGIC DIAGRAM Vcc C1 Y1 C3 B3 A3 Y3 AVAILABLE AS: 1) JAN: JM38510/30005BXA 2) SMD: N/A 3)883: 54LS10/BXAJC X = CASE OUTLINE AS FOLLOWS:


    OCR Scan     		PDF MIL-M-38510/30005 JM38510/30005BXA 54LS10/BXAJC 56A-02

    54LS109

    Abstract: 54LS109DMQB 54LS109FMQB DM54LS109AJ DM54LS109AW DM74LS109AM DM74LS109AN J16A M16A
    Text: June 1989 54LS109/54LS109A/DM74LSjK 9A Dual Positive-Edge-Triggered J-K Flip-Flops with Preset, Clear, and Complementary Outputs General Description This device contains two independent positive-edge-trig£ered J-K flip-flops with complementary outputs. The J and


    OCR Scan     		PDF 54LS109/DM54LS109A/DM74LSJ109A 54LS109 54LS109DMQB 54LS109FMQB DM54LS109AJ DM54LS109AW DM74LS109AM DM74LS109AN J16A M16A

    54LS10DMQB

    Abstract: DM74LS10N 54LS10 54LS10FMQB 54LS10LMQB DM54LS10J DM54LS10W DM74LS10 DM74LS10M E20A
    Text: S E M IC O N D U C T O R tm DM74LS10 Triple 3-Input NAND Gates General Description This device contains three independent gates each of which perform s the logic N AND function. Features • A lternate M ilitary/Aerospace device 54LS10 is available. C ontact a Fairchild Sem iconductor Sales


    OCR Scan     		PDF DM74LS10 54LS10) 54LS10DMQB, 54LS10FMQB, 54LS10LMQB, DM54LS10J, DM54LS10W, DM74LS10M DM74LS10N 54LS10DMQB 54LS10 54LS10FMQB 54LS10LMQB DM54LS10J DM54LS10W DM74LS10 E20A

    Untitled

    Abstract: No abstract text available
    Text: June 1989 54LS10/54LS10/DM74LS10 Triple 3-Input NAND Gates General Description Features This device contains three independent gates each of which performs the logic NAND function. • Alternate Military/Aerospace device 54LS10 is available. Contact a National Semiconductor Sales Office/


    OCR Scan     		PDF 54LS10/DM54LS10/DM74LS10 54LS10) 54LS10DMQB, 54LS10FMQB, 54LS10LMQB, DM54LS10J, DM54LS10W, DM74LS10M DM74LS10N

    Untitled

    Abstract: No abstract text available
    Text: S E M IC O N D U C T O R tm DM74LS10 Triple 3-Input NAND Gates General Description This device contains three independent gates each of which perform s the logic NAND function. Features • Alternate M ilitary/Aerospace device 54LS10 is available. C ontact a Fairchild Sem iconductor Sales


    OCR Scan     		PDF DM74LS10 54LS10) DS006349-1 54LS10DMQB, 54LS10FMQB, 54LS10LMQB, DM54LS10J, DM54LS10W, DM74LS10M

    Untitled

    Abstract: No abstract text available
    Text: 54LS109 Signetics Flip-Flop Dual J-K Positive Edge-Triggered Flip-Flop Product Specification Military Logic Products DESCRIPTION The 54LS109 is a dual positive edge-trig­ gered JK-type flip-flop featuring individual J, K, Clock, Set and Reset inputs; also


    OCR Scan     		PDF 54LS109 54LS109 54LSXXX 500ns S15ns 1N916 1N3064,

    54LS109

    Abstract: 54LS109DMQB 54LS109FMQB DM54LS109AJ DM54LS109AW DM74LS109AN J16A M16A LS109 DM74LS109
    Text: LS109A National Semiconductor 54LS109/54LS109A/DM74LS109A Dual Positive-Edge-Triggered J-K Flip-Flops with Preset, Clear, and Complementary Outputs General Description This device contains two independent positive-edge-triggered J-K flip-flops with complementary outputs. The J and


    OCR Scan     		PDF 54LS109/DM54LS109A/DM74LS109A 54LS109 54LS109DMQB 54LS109FMQB DM54LS109AJ DM54LS109AW DM74LS109AN J16A M16A LS109 DM74LS109

    Untitled

    Abstract: No abstract text available
    Text: M MOTOROLA Military 54LS107A Dual J -K Flip-Flop W ith C lear ELECTRICALLY TESTED PER: MIL-M-38510/30108 M The 54LS107A is a Dual J-K flip-flop with individual J, K, Direct Clear and Clock Pulse inputs. Output changes are initiated by the HIGH to LOW transition of the clock. A LOW signal on CD input overrides the


    OCR Scan     		PDF 54LS107A MIL-M-38510/30108 54LS107A JM38510/30108BXA 54LS107A/BXAJC

    Untitled

    Abstract: No abstract text available
    Text: M Military 54LS10 M O T O R O L A Triple 3-Input Positive NAND Gate MP0 mini ELECTRICALLY TESTED PER: MIL-M-38510/30005 LOGIC DIAGRAM V cc C1 Y1 C3 B3 A3 V3 AVAILABLE AS: 1) JAN: JM3B510/30005BXA 2) SMD: N/A 3)883: 54LS10/BXAJC X = CASE OUTLINE AS FOLLOWS:


    OCR Scan     		PDF 54LS10 MIL-M-38510/30005 JM3B510/30005BXA 54LS10/BXAJC 56A-02

    Untitled

    Abstract: No abstract text available
    Text: S E M IC O N D U C T O R tm DM74LS10 Triple 3-Input NAND Gates General Description This device contains three independent gates each of which performs the logic NAND function. Features • Alternate Military/Aerospace device 54LS10 is available. Contact a Fairchild Semiconductor Sales


    OCR Scan     		PDF DM74LS10 54LS10) DSOO6349-1 54LS10DMQB, 54LS10FMQB, 54LS10LMQB, DM54LS10J, DM54LS10W, DM74LS10M