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    54AC11002 Datasheets (4)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    54AC11002 Texas Instruments QUADRUPLE 2-INPUT POSITIVE-NOR GATES Original PDF
    54AC11002 Texas Instruments QUADRUPLE 2-INPUT POSITIVE-NOR GATES Original PDF
    54AC11002FK Texas Instruments IC NOR GATE QUAD 2IN CMOS 20LCCC Original PDF
    54AC11002J Texas Instruments IC NOR GATE QUAD 2IN CMOS 16CDIP Original PDF

    54AC11002 Datasheets Context Search

    Catalog Datasheet MFG & Type Document Tags PDF

    Untitled

    Abstract: No abstract text available
    Text: 54AC11002, 74AC11002 QUADRUPLE 2ĆINPUT POSITIVEĆNOR GATES ăą SCAS024A − JUNE 1987 − REVISED APRIL 1993 • • • • • 54AC11002 . . . J PACKAGE 74AC11002 . . . D OR N PACKAGE TOP VIEW Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configuration


    Original
    54AC11002, 74AC11002 SCAS024A 54AC11002 500-mA 300-mil 54AC11002 PDF

    5V 2A SW regulator

    Abstract: 54AC11002 74AC11002
    Text: 54AC11002, 74AC11002 QUADRUPLE 2-INPUT POSITIVE-NOR GATES SCAS024A – JUNE 1987 – REVISED APRIL 1993 • • • • • 54AC11002 . . . J PACKAGE 74AC11002 . . . D OR N PACKAGE TOP VIEW Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configuration


    Original
    54AC11002, 74AC11002 SCAS024A 54AC11002 500-mA 300-mil 5V 2A SW regulator 54AC11002 74AC11002 PDF

    54AC11002

    Abstract: 74AC11002
    Text: 54AC11002, 74AC11002 QUADRUPLE 2ĆINPUT POSITIVEĆNOR GATES ăą SCAS024A − JUNE 1987 − REVISED APRIL 1993 • • • • • 54AC11002 . . . J PACKAGE 74AC11002 . . . D OR N PACKAGE TOP VIEW Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configuration


    Original
    54AC11002, 74AC11002 SCAS024A 54AC11002 500-mA 300-mil 54AC11002 74AC11002 PDF

    54AC11002

    Abstract: 74AC11002
    Text: 54AC11002, 74AC11002 QUADRUPLE 2-INPUT POSITIVE-NOR GATES SCAS024A – JUNE 1987 – REVISED APRIL 1993 • • • • • 54AC11002 . . . J PACKAGE 74AC11002 . . . D OR N PACKAGE TOP VIEW Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configuration


    Original
    54AC11002, 74AC11002 SCAS024A 54AC11002 500-mA 300-mil 54AC11002 74AC11002 PDF

    5962F8761201XA

    Abstract: 5962-R102-93 54AC02 QML V qml-38535 5962F8761201VXC RHFAC02D03V 5962F87612 rhfac 5962F87612019A RHFAC02
    Text: REVISIONS LTR DESCRIPTION DATE YR-MO-DA APPROVED A Add device type 02. Add vendor CAGE 01295 for device type 02, cases E, F, and 2. Technical changes in section 1.4 and table I. Change drawing CAGE code to 67268. Editorial changes throughout. 89-08-11 M. A. Frye


    Original
    5962-R102-93. F8859. MIL-PRF-38535 F8859 5962F8761201XA 5962-R102-93 54AC02 QML V qml-38535 5962F8761201VXC RHFAC02D03V 5962F87612 rhfac 5962F87612019A RHFAC02 PDF

    5962L0053605VYC

    Abstract: 5962-9069204QXA ATMEL 302 24C16 UT9Q512E-20YCC MOH0268D UT54ACS164245SEIUCCR Z085810 5962-9762101Q2A UT28F256QLET-45UCC 5962R0250401KXA
    Text: NOT MEASUREMENT SENSITIVE MIL-HDBK-103AJ 19 SEPTEMBER 2011 SUPERSEDING MIL-HDBK-103AH 28 MARCH 2011 DEPARTMENT OF DEFENSE HANDBOOK LIST OF STANDARD MICROCIRCUIT DRAWINGS This handbook is for guidance only. Do not cite this document as a requirement. AMSC N/A


    Original
    MIL-HDBK-103AJ MIL-HDBK-103AH MIL-HDBK-103AJ 5962L0053605VYC 5962-9069204QXA ATMEL 302 24C16 UT9Q512E-20YCC MOH0268D UT54ACS164245SEIUCCR Z085810 5962-9762101Q2A UT28F256QLET-45UCC 5962R0250401KXA PDF

    Untitled

    Abstract: No abstract text available
    Text: 54AC11002, 74AC11002 QUADRUPLE 2-INPUT POSITIVE-NOR GATES D2957, JUNE 1987 - REVISED APRIL 1993 54AC11002 . . . J PACKAGE 74AC11002 . . . D OR N PACKAGE TOP VIEW Flow-Through Architecture Optimizes PCB Layout Center-Pin Vcc and GND Configuration Minimizes High-Speed Switching Noise


    OCR Scan
    54AC11002, 74AC11002 D2957, 500-mA 300-mil 54AC11002 PDF

    54AC11002

    Abstract: 74AC 74AC11002 D2957 11002
    Text: 54AC11002, 74AC11002 QUADRUPLE 2-INPUT POSITIVE-NOR GATES TI0042— 0 2 9 5 7 , JU N E 1987— R EVISED M ARCH 1990 Row-Through Architecture to Optimize PCB Layout 5 4 A C 1 1002 . . . J P ACKA G E 74A C 11 0 02 . . . D O R N P A C K A G E TO P V IE W Center-Pin V c c and GND Configurations to


    OCR Scan
    54AC11002, TI0042â D2957, 500-mA 300-mil 54AC11002 74AC11002 TI0042 74AC D2957 11002 PDF

    Untitled

    Abstract: No abstract text available
    Text: 54AC11002, 74AC11002 QUADRUPLE 2-INPUT POSITIVE-NOR GATES TI0042— 0 2 9 5 7 . JU NE 1907— REVISED MARCH 1990 • Flow-Through Architecture to Optimize PCB Layout 54AC11002 . . . J PACKAGE 74AC11002 . . . D OR N PACKAGE TOP VIEW • Center-Pin Vqc and GND Configurations to


    OCR Scan
    54AC11002, 74AC11002 TI0042-- 500-mA 300-mil D2957. TI0042 PDF

    DIODE smd marking v1H

    Abstract: 54C02 5962-87612022X 54AC02 54AC11002 5962-8761201DX SNJ54AC11002FK
    Text: REVISIONS LTR A DATE YR-MO-DA DESCRIPTION Add device type 02. Add vendor CAGE 01295 for device type 02, case outlines E, F, and 2. Technical changes to 1.4, table I. Change drawing CAGE code to 67268. Editorial changes throughout. APPROVED 1989 AUG 11 CURRENT CAGE CODE 67268


    OCR Scan
    5962-002FK 549-KM DIODE smd marking v1H 54C02 5962-87612022X 54AC02 54AC11002 5962-8761201DX SNJ54AC11002FK PDF

    Untitled

    Abstract: No abstract text available
    Text: SAMSUNG ELECTRONICS INC b?E T> 7 *îb4 m s 0P17S1S bSO • SMGK PRELIMINARY BiCMOS SRAM KM68B261A ABSOLUTE MAXIMUM RATINGS* Item Voltage on Any Pin Relative to Vss Voltage on Vcc Supply Relative to VSs Power Dissipation Storage Temperature Operating Temperature


    OCR Scan
    0P17S1S KM68B261A D2957, APRIL1993 bl723 0DT42H5 PDF