Contextual Info: in te i’ 51C256L LOW POWER 256K X 1 CHMOS DYNAMIC RAM 51C256L-15 51C256L-20 Maximum Access Time ns 150 200 Maximum CHMOS Standby Current (mA) 0.1 0.1 • Low Power Data Retention ■ TTL and HCT Compatible — Standby current, CHMOS — 100 ¡¡A (max.)

51C256L

Abstract: 51C256L-12 51C256L-15 51C256L-20 28003* intel
Contextual Info: [P iF S iiU B lO tM Ä ß W in te T 51C256L LOW POWER 256K x 1 CHMOS DYNAMIC RAM Maximum Access Time ns Maximum CHMOS Standby Current (mA) • Low Power Data Retention - Standby current, CHMOS — 1 0 0 /¿A (max.) - Refresh period, RAS-Only — 32ms (max.)

Contextual Info: int ! 51C256L LOW POWER 256K X 1 CHMOS DYNAMIC RAM 51C256L-15 51C25Ì6L-20 Maximum Access Time ns 150 200 Maximum CHMOS Standby Current (mA) 0.1 0.1 • Low Power Data Retention ■ TTL and HCT Compatible — Standby current, CHMOS — 100 jxA (max.) — Refresh period, RAS-Only — 32 ms (max)

28003* intel

Abstract: 51C256L 51C256L-15 51C256L-20 2800-310
Contextual Info: in te i 51C256L LOW POWER 256K X 1 CHMOS DYNAMIC RAM 51C256L-15 51C256L-20 Maximum Access Time ns 150 200 Maximum CHMOS Standby Current (mA) 0.1 0.1 Low Power Data Retention • TTL and HCT Compatible — Standb y current, C HM O S — 100 /¿A (m ax.) — R efresh period, R AS-O nly — 32 m s (m ax)

Contextual Info: in té T 51C256L LOW POWER 256K x 1 CHMOS DYNAMIC RAM 51C256L-12 Maximum Access Time ns Maximum CHMOS Standby Current (mA) 120 0.1 • Low Power Data Retention - Standby current, CHMOS — 100 nA (max.) - Refresh period, RAS-Only — 32 ms (max.) - Data Retention Current — 230 ¡¡A

Contextual Info: in te i' 51C256L LOW POWER 256K x 1 CHMOS DYNAMIC RAM 51C256L-12 120 0.1 Maximum Access Time ns Maximum CHMOS Standby Current (mA) 51C256L-15 150 0.1 51C256L-20 200 0.1 • Low Operating Current — 50 mA (max.) ■ Low Power Data Retention - Standby current, CHMOS — 100

51C256L

Abstract: 51C256L-15 51C256L-20
Contextual Info: in te i 51C256L LOW POWER 256K X 1 CHMOS DYNAMIC RAM 51C256L-15 51C29Î6L-20 Maximum Access Tim e ns 150 200 Maximum CHMOS Standby Current (mA) 0.1 0.1 • Low Power Data Retention ■ TTL and HCT Com patible — Standby current, CHMOS — 100 jxA (max.)

iw 1688

Abstract: 57C256 51C256L 51C256L-12 51C256L-15 51C256L-20 28003* intel
Contextual Info: P E E L m m ^ m ir it e T 51C256L LOW POWER 256K x 1 CHMOS DYNAMIC RAM 51C256L-12 51C256L-15 51C256L-20 120 150 200 0.1 0.1 0.1 Maximum Access Time ns Maximum CHMOS Standby Current (mA) Low Operating Current — 50 mA (max.) • Low Power Data Retention

KM41C256-8

Abstract: HM51256P-10 km41c256 HM51256P-12 HM51256LP-10 HM51256P-15 KM41C256-10 HM51256LCP-10 MB81C258-10 HM51256CP-15
Contextual Info: - 2 5 6 K X i m & tt £ OC TRAC max ns) CMOS • ; + TRCY min (ns) TCAD (ns) TAH min (ns) > ? TF mir (ns) D y n a m i c RAM íf li TWCY min (ns) TDH (ns) TRWC min (ns) V D D or V C C (V) 16 P I N ( 2 6 2 1 4 4 X 1 M A M 1 DD max (mA) ti [+typ] 5 12 5 8 ÍÜ

51C256L

Abstract: 51C258L 51C258L-12 51C258L-15 51C258L-20
Contextual Info: in t e T 5102581-* LOW POWER 6 4 K x 4 CHMOS DYNAMIC RAM 51C258L-12 120 0.1 Maximum Access Time ns Maximum CHMOS Standby Currant (mA) 51C258L^20 200 0.1 51C258L-15 150 0.1 • Low Operating Current — 50 mA (max.) Low Power Data Retention - Standby current, CHMOS — 100/iA

HY51C256-12

Abstract: 51c256 GM71C256-80 GM71C256-10 GoldStar 51C256H-12 51C256H-20 51C256HL-15 51C256HL-20 51C256L-15
Contextual Info: - 256K m & ít £ * fc> TRAC max ns TRCY min (ns) CMOS D y n a m ic 'i -y ^ y y n\i TCAD »in (ns) TAH TP nin (ns) •in (ns) TWCY nin (ns) R A M (2 6 2 1 4 4 x 1) M m TDH TRWC ■in (ns) ain (ns) V D D or V C C (V) I DD max (b A) 16 P I N A ( VIL ■ax

VU METER 32 led

Abstract: V51C256L-12 V51C256L-15 V51C256L-20 BA5Z
Contextual Info: V V IT E L IC 51C256L FAM ILY H IG H P ER FO R M A N C E LO W PO W ER 2 5 6 K x 1 B IT CMOS D Y N A M IC R A M 51C256L-12 51C256L-15 51C256L-20 M axim um Access Tim e ns M aximum Colum n A ddress Access Time (ns) 120 150 200 60 70 90 M aximum CMOS Standby Current (mA)