PECL

Abstract: PECL3-H 3PECLH 3PECLH-0.5 3PECLH-10 PECL3-10
Contextual Info: 3-Bit Programmable Delay Modules PECL3 Series 10K ECL Logic 3PECLH Series 10KH ECL Logic Delay per Step ns Error ref. to "000" (ns) OUT 16 15 ECL 3-Bit Schematic P2 P3 10 9 3-Bit Programmable Delay Line Output Buffer Available in Surface Mount Electrical Specifications at 25OC

Contextual Info: 3-Bit Programmable Delay Modules PECL3 Series 10K ECL Logic 3PECLH Series 10KH ECL Logic Vcc OUT 16 15 ECL 3-Bit Schematic P2 10 £2 Output Buffer 3-Bit Programmable Delay Line 1_ Available in Surface Mount Vcc P1 IN Vee ENABLE input E , Pin 2, is active low.

Contextual Info: R H O M BU S I N D U S T R I E S INC t.3E P • 7 7 5 1 15 0 0 0 0 0 ^3 1 517 ■ Electrical Spedfications at 25°C Delay Max. Deviation Output Delay ns per Program Setting (P3*P2*P1) per Step Part Number ref. to 000 (ns) (ns) 000 001 010 O il 100 101 110 111

Contextual Info: PECL3 Series 10K ECL Logic 3-Bit Programmable Delay Modules Electrical Specifications at 25°C 3-Bit 10K ECL Part Number Delay per Step ns PECL3-0.5 PECL3-0.75 PECL3-1 PECL3-1.2 PECL3-1.25 PECL3-1.3 PECL3-1.5 PECL3-1.75 PECL3-2 PECL3-2.5 PECL3-3 PECL3-5

D1640-0

Contextual Info: 10K ECL Logic 3-Bit Programmable Delay Modules Part Number Delay per Step ns PECL3-0.5 PECL3-1 PECL3-1.5 PECL3-2 PECL3-2.5 PECL3-3 PECL3-3.5 PECL3-4 PECL3-4.5 PECL3-5 PECL3-10 0.5 ± .25 1.0 ±.40 1.51.50 2.0 ± .70 2.5 ± .70 3.0 ± .70 3.51.80 4.01.80

3PECLH

Abstract: PECL3 3PECLH-0.5 3PECLH-10 PECL3-10
Contextual Info: PECL3 Series 10K ECL Logic 3-Bit Programmable Delay Modules Electrical Specifications at 25OC Error ref. 3-Bit 10K ECL Delay per to 000 Part Number Step ns (ns) PECL3-0.5 0.5 ± .25 ± .30 PECL3-0.75 0.75 ± .3 ± .50 PECL3-1 1.0 ± .4 ± .50 PECL3-1.2 1.2 ± .4

Active (Logic Buffered)

Abstract: AML12-1 SP24L10005 SMD transistor M05 AMY-5 LVMDM-45G PLDM7-2.5 SMD 0505 RESISTOR 10K OHMS smd 2d 1002 -reel TZB4* "cross reference"
Contextual Info: Rhombus Industries Inc. 2001 Transformers & Magnetic Products Delay Lines Electromagnetic ∆t Logic Buffered Delay Low Distortion Buffered Input / Output Fast Rise Times 5V FAST/TTL & Advanced CMOS Single Output 5 Taps 10 Taps 16 Taps 20 Taps 3V Logic, Low Voltage CMOS

Contextual Info: Electrical Specifications at 25°C Delay Max. Deviation Output Delay ns per Program Setting (P3*P2*P1) per Step ref. to Part Number (ns) (ns) no 4 4.5 5 ±.30 PECL3-0.5 0.5 ±.25 3 ±.30 3.5 5.5 6.5 4 ±.50 PECL3-1 ±.40 3 ±.30 5 7 9 PECL3-1.5 1.5 ±.50

Contextual Info: PECL3 Seríes 10K ECL Logic 3-Bit Programmable Delay Modules Electrical Specifications at 25°C Delay per Step ns Error ref. to 000 (ns) Initial Delay (ns) 000 000 001 010 011 100 101 110 PECL3-0.5 0.5 ± .25 + .30 3 + 0.5 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5

Delay Lines

Abstract: SMD 0505 RESISTOR 10K OHMS SMD transistor M05 equivalent ZO 607 TZB12-5 TF80 AMY-5 analog delay line schematic AML1-12-10 PLDM7-2.5
Contextual Info: Rhombus Industries Inc. 2002 Transformers & Magnetic Products Delay Lines Electromagnetic ∆t Logic Buffered Delay Low Distortion Buffered Input / Output Fast Rise Times 5V FAST/TTL & Advanced CMOS Single Output 5 Taps 10 Taps 16 Taps 20 Taps 3V Logic, Low Voltage CMOS