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    Microchip Technology Inc PIC32MX360F512L-80I/PT

    IC MCU 32BIT 512KB FLASH 100TQFP
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    DigiKey PIC32MX360F512L-80I/PT Tray 380 1
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    Microchip Technology Inc PIC32MX360F512LT-80I/PT

    IC MCU 32BIT 512KB FLASH 100TQFP
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    DigiKey PIC32MX360F512LT-80I/PT Cut Tape 308 1
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    Microchip Technology Inc PIC32MX360F256L-80I/PT

    IC MCU 32BIT 256KB FLASH 100TQFP
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    DigiKey PIC32MX360F256L-80I/PT Tray 227 1
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    Microchip Technology Inc PIC32MX360F256L-80I/BG

    IC MCU 32BIT 256KB FLSH 121TFBGA
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    DigiKey PIC32MX360F256L-80I/BG Tray 184 1
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    PIC32MX360F256L-80I/BG 36 1
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    Microchip Technology Inc PIC32MX360F256L-80V/BG

    IC MCU 32BIT 256KB FLSH 121TFBGA
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    DigiKey PIC32MX360F256L-80V/BG Tray 184 1
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    Find more 2M X 36 price and stock on Findchips.com

    2M X 36 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    HYS64V2100G

    Abstract: No abstract text available
    Text: 3.3V 2M x 64-Bit SDRAM Module 3.3V 2M x 72-Bit SDRAM Module HYS64V2100G C U-10 HYS72V2100G(C)U-10 168 pin unbuffered DIMM Modules Advanced Information • 168 Pin JEDEC Standard, Unbuffered 8 Byte Dual-In-Line SDRAM Module • 1 bank 2M x 64, 2M x 72 organisation


    Original     		PDF 64-Bit 72-Bit HYS64V2100G HYS72V2100G DM168-27 HYS64 V2100G L-DIM-168-C1 DM168-C1

    HYS64V2100G

    Abstract: No abstract text available
    Text: 3.3V 2M x 64-Bit SDRAM Module 3.3V 2M x 72-Bit SDRAM Module HYS64V2100G C U-10 HYS72V2100G(C)U-10 168 pin unbuffered DIMM Modules • 168 Pin JEDEC Standard, Unbuffered 8 Byte Dual-In-Line SDRAM Module for PC main memory applications • 1 bank 2M x 64, 2M x 72 organisation


    Original     		PDF 64-Bit 72-Bit HYS64V2100G HYS72V2100G DM168-27 HYS64 V2100G L-DIM-168-C1 DM168-C1

    Untitled

    Abstract: No abstract text available
    Text: CY7C1317BV18 CY7C1319BV18 CY7C1321BV18 PRELIMINARY 18-Mbit DDR-II SRAM 4-Word Burst Architecture Features Functional Description • 18-Mbit density 2M x 8, 2M x 9, 1M x 18, 512K x 36 The CY7C1317BV18, CY7C1917BV18, CY7C1319BV18, and CY7C1321BV18 are 1.8V Synchronous Pipelined SRAM


    Original     		PDF CY7C1317BV18 CY7C1319BV18 CY7C1321BV18 18-Mbit 300-MHz 600MHz) CY7C1917BV18 BB165E

    Untitled

    Abstract: No abstract text available
    Text: CY7C11461KV18, CY7C11571KV18 CY7C11481KV18, CY7C11501KV18 18-Mbit DDR II+ SRAM 2-Word Burst Architecture 2.0 Cycle Read Latency Features Functional Description • 18-Mbit Density (2M x 8, 2M x 9, 1M x 18, 512K x 36) ■ 450 MHz Clock for High Bandwidth


    Original     		PDF CY7C11461KV18, CY7C11571KV18 CY7C11481KV18, CY7C11501KV18 18-Mbit CY7C11571KV18, CY7C11501KV18 CY7C11461KV18)

    Untitled

    Abstract: No abstract text available
    Text: CY7C11661KV18, CY7C11771KV18 CY7C11681KV18, CY7C11701KV18 18-Mbit DDR II+ SRAM 2-Word Burst Architecture 2.5 Cycle Read Latency Features Functional Description • 18-Mbit Density (2M x 8, 2M x 9, 1M x 18, 512K x 36) ■ 550 MHz Clock for High Bandwidth


    Original     		PDF CY7C11661KV18, CY7C11771KV18 CY7C11681KV18, CY7C11701KV18 18-Mbit CY7C11771KV18, CY7C11701KV18 CY7C11661KV18)

    CY7C11681KV18

    Abstract: 3M Touch Systems
    Text: CY7C11661KV18, CY7C11771KV18 CY7C11681KV18, CY7C11701KV18 18-Mbit DDR II+ SRAM 2-Word Burst Architecture 2.5 Cycle Read Latency Features Functional Description • 18-Mbit Density (2M x 8, 2M x 9, 1M x 18, 512K x 36) ■ 550 MHz Clock for High Bandwidth


    Original     		PDF CY7C11661KV18, CY7C11771KV18 CY7C11681KV18, CY7C11701KV18 18-Mbit CY7C11681KV18 3M Touch Systems

    IS61LPS204836B-200TQ

    Abstract: IS61VVPS204836B-166B3L
    Text: IS61LPS409618B, IS61LPS204836B, IS61LPS204832B, IS64LPS204836B, IS61VPS/VVPS409618B, IS61VPS/VVPS204836B 2M x 36, 2M x 32, 4M x 18 72 Mb SYNCHRONOUS PIPELINED, SINGLE CYCLE DESELECT STATIC RAM ADVANCED INFORMATION OCTOBER 2012 FEATURES DESCRIPTION • Internal self-timed write cycle


    Original     		PDF IS61LPS409618B, IS61LPS204836B, IS61LPS204832B, IS64LPS204836B, IS61VPS/VVPS409618B, IS61VPS/VVPS204836B MS-028 IS61LPS204836B-200TQ IS61VVPS204836B-166B3L

    Untitled

    Abstract: No abstract text available
    Text: CY7C11461KV18, CY7C11571KV18 CY7C11481KV18, CY7C11501KV18 18-Mbit DDR II+ SRAM 2-Word Burst Architecture 2.0 Cycle Read Latency Features Functional Description • 18-Mbit Density (2M x 8, 2M x 9, 1M x 18, 512K x 36) ■ 450 MHz Clock for High Bandwidth


    Original     		PDF CY7C11461KV18, CY7C11571KV18 CY7C11481KV18, CY7C11501KV18 18-Mbit CY7C11571KV18, CY7C11501KV18 CY7C11461KV18)

    Untitled

    Abstract: No abstract text available
    Text: CY7C11661KV18, CY7C11771KV18 CY7C11681KV18, CY7C11701KV18 18-Mbit DDR II+ SRAM 2-Word Burst Architecture 2.5 Cycle Read Latency Features Functional Description • 18-Mbit Density (2M x 8, 2M x 9, 1M x 18, 512K x 36) ■ 550 MHz Clock for High Bandwidth


    Original     		PDF CY7C11661KV18, CY7C11771KV18 CY7C11681KV18, CY7C11701KV18 18-Mbit CY7C11771KV18, CY7C11701KV18 CY7C11661KV18)

    CY7C1317BV18

    Abstract: CY7C1319BV18 CY7C1321BV18 CY7C1917BV18
    Text: CY7C1317BV18 CY7C1917BV18 CY7C1319BV18 CY7C1321BV18 18-Mbit DDR-II SRAM 4-Word Burst Architecture Features Functional Description • 18-Mbit density 2M x 8, 2M x 9, 1M x 18, 512K x 36 The CY7C1317BV18, CY7C1917BV18, CY7C1319BV18, and CY7C1321BV18 are 1.8V Synchronous Pipelined SRAM


    Original     		PDF CY7C1317BV18 CY7C1917BV18 CY7C1319BV18 CY7C1321BV18 18-Mbit CY7C1317BV18, CY7C1917BV18, CY7C1319BV18, CY7C1321BV18 CY7C1317BV18 CY7C1319BV18 CY7C1917BV18

    IS61LPS204832B

    Abstract: No abstract text available
    Text: IS61LPS409618B, IS61LPS204836B, IS61LPS204832B, IS64LPS204836B, IS61VPS/VVPS409618B, IS61VPS/VVPS204836B 2M x 36, 2M x 32, 4M x 18 72 Mb SYNCHRONOUS PIPELINED, SINGLE CYCLE DESELECT STATIC RAM ADVANCED INFORMATION FEBRUARY 2013 FEATURES DESCRIPTION • Internal self-timed write cycle


    Original     		PDF IS61LPS409618B, IS61LPS204836B, IS61LPS204832B, IS64LPS204836B, IS61VPS/VVPS409618B, IS61VPS/VVPS204836B VS61LPS204836B, IS61LPS204832B

    3M Touch Systems

    Abstract: No abstract text available
    Text: CY7C11661KV18, CY7C11771KV18 CY7C11681KV18, CY7C11701KV18 18-Mbit DDR II+ SRAM 2-Word Burst Architecture 2.5 Cycle Read Latency Features Functional Description • 18-Mbit Density (2M x 8, 2M x 9, 1M x 18, 512K x 36) ■ 550 MHz Clock for High Bandwidth


    Original     		PDF CY7C11661KV18, CY7C11771KV18 CY7C11681KV18, CY7C11701KV18 18-Mbit CY7C11771KV18, CY7C11701KV18 CY7C11661KV18) 3M Touch Systems

    Untitled

    Abstract: No abstract text available
    Text: CY7C11661KV18, CY7C11771KV18 CY7C11681KV18, CY7C11701KV18 18-Mbit DDR II+ SRAM 2-Word Burst Architecture 2.5 Cycle Read Latency Features Functional Description • 18-Mbit Density (2M x 8, 2M x 9, 1M x 18, 512K x 36) ■ 550 MHz Clock for High Bandwidth


    Original     		PDF CY7C11661KV18, CY7C11771KV18 CY7C11681KV18, CY7C11701KV18 18-Mbit CY7C11771KV18, CY7C11701KV18 CY7C11661KV18)

    Untitled

    Abstract: No abstract text available
    Text: SIEMENS 3.3V 2M x 64-Bit SDRAM Module 3.3V 2M x 72-Bit SDRAM Module HYS64V2000GU HYS72V2000GU 168 pin unbuffered DIMM Modules Preliminary Information • 168 Pin JEDEC Standard, Unbuffered 8 Byte Dual-ln-Line SDRAM Module • 1 bank 2M x 64, 2M x 72 organisation


    OCR Scan     		PDF 64-Bit 72-Bit HYS64V2000GU HYS72V2000GU HYS64 V2000GU

    Untitled

    Abstract: No abstract text available
    Text: SIEM ENS 3.3V 2M x 64-Bit SDRAM Module 3.3V 2M x 72-Bit SDRAM Module HYS64V2000GU HYS72V2000GU 168 pin unbuffered DIMM Modules Prelim inary Inform ation • 168 Pin JEDEC Standard, Unbuffered 8 Byte Dual-In-Line SDRAM Module • 1 bank 2M x 64, 2M x 72 organisation


    OCR Scan     		PDF 64-Bit 72-Bit HYS64V2000GU HYS72V2000GU HYS64 V2000GU 91X127 QLD06877

    Untitled

    Abstract: No abstract text available
    Text: SIEMENS 3.3V 2M x 64-Bit SDRAM Module 3.3V 2M x 72-Bit SDRAM Module HYS64V2100G C U-10 HYS72V2100G(C)U-10 168 pin unbuffered DIMM Modules Advanced Information • 168 Pin JEDEC Standard, Unbuffered 8 Byte Dual-In-Line SDRAM Module • 1 bank 2M x 64, 2M x 72 organisation


    OCR Scan     		PDF 64-Bit 72-Bit HYS64V2100G HYS72V2100G 19-2S HYS64 V2100G 535bGS I1524Ã

    Untitled

    Abstract: No abstract text available
    Text: SIEMENS 3.3V 2M x 64-Bit SDRAM Module 3.3V 2M x 72-Bit SDRAM Module HYS64V2100G C U-10 HYS72V2100G(C)U-10 168 pin unbuffered DIMM Modules * 168 Pin JED EC Standard, Unbuffered 8 Byte Dual-In-Line SDRAM Module for PC main memory applications * 1 bank 2M x 64, 2M x 72 organisation


    OCR Scan     		PDF 64-Bit 72-Bit HYS64V2100G HYS72V2100G L-DIM-168-27 DM168-27 HYS64 V2100G L-DIM-168-C1 DM168-C1

    s2mX

    Abstract: No abstract text available
    Text: 3.3V 2M x 64-Bit SDRAM Module 3.3V 2M x 72-Bit SDRAM Module HYS64V2000GU HYS72V2000GU 168 pin unbuffered DIMM Modules Advanced Information • 168 Pin JEDEC Standard, Unbuffered 8 Byte Dual-ln-Line SDRAM Module • 1 bank 2M x 64, 2M x 72 organisation • Optimized for byte-write non-parity or ECC applications


    OCR Scan     		PDF 64-Bit 72-Bit HYS64V2000GU HYS72V2000GU HYS64 V2000GU s2mX

    Untitled

    Abstract: No abstract text available
    Text: MOSEL- VITELIC V404J232 and V404J236 2M X 32 and 2M X 36 CMOS MEMORY MODULES PRELIMINARY Features Description • ■ ■ ■ ■ ■ The V404J232 memory Module is organized as 2,097,152 x 32 bits in a 72-lead single-in-line mod­ ule. The 2M x 32 memory module uses 16 MoselVitelic 1M x 4 DRAMs. The V404J236 Memory


    OCR Scan     		PDF V404J232 V404J236 72-lead 72lead V404J232/236

    Untitled

    Abstract: No abstract text available
    Text: STI322000D1 -xxV 72-PIN DIMMS 2M X 32 DRAM DIMM Memory Module FEATURES GENERAL DESCRIPTION • The Simple Technology STI322000D1 is a 2M bits x 32 Dynamic RAM high density memory module. The Simple Technology STI322000D1 consist of four CMOS 2M x 8 DRAMs in 28-pin


    OCR Scan     		PDF STI322000D1 STI322000D1-60 STI322000D1-80V 110ns 130ns 150ns 72-PIN

    Untitled

    Abstract: No abstract text available
    Text: KM29V16000ATS ELECTRO NICS Flash 2M x 8 Bit NAND Flash Memory GENERAL DESCRIPTION FEATURES • Single 3.3 - volt Supply The KM29V16000ATS/RS is a 2M 2,097,152 x8 bit NAND • Organization - Memory Cell Array : (2M +64K)bit x 8bit - Data Register : (256 + 8)bit x 8bit


    OCR Scan     		PDF KM29V16000ATS KM29V16000ATS/RS 264-byte 250ps -TSOP2-400F -TSOP2-400R 0031flfll

    Untitled

    Abstract: No abstract text available
    Text: STI322000B 72-PIN SIMMS 2M X 32 DRAM SIMM Memory Module FEATURES GENERAL DESCRIPTION • The Simple Technology STI322000B is a 2M bits- x 32 Dynamic RAM high density memory module. The Simple Technology STI322000B consist of four CMOS 2M x 8 DRAMs in 28-pin


    OCR Scan     		PDF STI322000B STI322000B-60 STI322000B-70 STI322000B-80 110ns 130ns 150ns 72-PIN STI322000B

    Untitled

    Abstract: No abstract text available
    Text: STI642004G1-60SVG 144-PIN SO-DIMMS 2M X 64 Bits DRAM SO-DIMM Memory Module FEATURES GENERAL DESCRIPTION • The Simple Technology STI642004G1-60SVG is a 2M x 64 bits Dynamic RAM high density memory module. The Simple Technology STI642004G1-60SVG consist of eight CMOS 2M x


    OCR Scan     		PDF STI642004G1-60SVG 144-PIN 104ns STI642004G1-60SVG 28-pin 400-mil 144-pithin

    Untitled

    Abstract: No abstract text available
    Text: STI322000D1 72-PIN DIMMS 2M X 32 DRAM DIMM Memory Module FEATURES GENERAL DESCRIPTION • The Simple Technology STI322000D1 is a 2M bits x 32 Dynamic RAM high density memory module. The Simple Technology STI322000D1 consist of four CMOS 2M x 8 DRAMs in 28-pin


    OCR Scan     		PDF STI322000D1 STI322000D1 110ns 130ns 150ns 72-PIN