Untitled
Abstract: No abstract text available
Text: WEDPY256K72V-XBX 256Kx72 Synchronous Pipeline SRAM FEATURES DESCRIPTION Fast clock speed: 100, 133, 150, 166 and 200* MHz The WEDPY256K72V-XBX employs high-speed, low-power CMOS designs that are fabricated using an advanced CMOS process. The 16Mb Synchronous SRAMs integrate two 256K x 36 SRAMs
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WEDPY256K72V-XBX
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WEDPY256K72V-XBX
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256Kx72
Abstract: EP-3 ae2a
Text: Preliminary 256Kx72 Double Late Write SigmaRAMTM K7N167285A 256Kx72-Bit Pipelined SigmaRAMTM FEATURES GENERAL DESCRIPTION • Double Late Write mode , Pipelined Read mode. • 1.8V+150/-100 mV Power Supply. • 1.8V I/O supply. • Byte Writable Function.
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256Kx72
K7N167285A
256Kx72-Bit
209BGA
11x19
K7N167285A
368-bits
EP-3
ae2a
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Untitled
Abstract: No abstract text available
Text: WEDPY256K72V-XBX 256Kx72 Synchronous Pipeline SRAM Preliminary* FEATURES DESCRIPTION n Fast clock speed: 100, 133, 150, 166 and 200* MHz The WEDPY256K72V-XBX employs high-speed, low-power CMOS designs that are fabricated using an advanced CMOS process. The 16Mb Synchronous SRAMs integrate
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WEDPY256K72V-XBX
256Kx72
WEDPY256K72V-XBX
256K72
100MHz
133MHz
150MHz
166MHz
200MHZ
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tc-l 11w
Abstract: K7N167245A K7N167249A
Text: Preliminary 256Kx72 Pipelined NtRAMTM K7N167245A Document Title 256Kx72-Bit Pipelined NtRAM TM Revision History Rev. No. 0.0 0.1 0.2 0.3 History Draft Date Remark 1. Initial document. 1. Add JTAG Scan Order 1. Upate DC characteristics icc,isb 1. Speed bin merge.
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256Kx72
K7N167245A
256Kx72-Bit
K7N167249A
K7N167245A.
11x19
tc-l 11w
K7N167245A
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PDF
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CQ226
Abstract: tk 69 K7Z167285A
Text: K7Z167285A Preliminary 256Kx72 Double Late Write SigmaRAMTM Document Title 256Kx72 Double Late Write SigmaRAM TM Revision History Rev. No. 0.0 0.1 0.2 0.3 History Draft Date Remark 1. 1. 1. 1. November 2, 2000 March 30, 2001 May 16, 2001 July 18, 2001 Preliminary
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K7Z167285A
256Kx72
K7N167285A
11x19
CQ226
tk 69
K7Z167285A
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PDF
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MCM72F8
Abstract: MCM72F9 bQ54 111al2 Nippon capacitors
Text: MOTOROLA SEMICONDUCTOR TECHNICAL Order this document by MCM72F8/D DATA Advance information 2MB and 4MB Synchronous Static RAM Module Fast The MCM72F8 2 MB is configured as 256Kx72 bits and the MCM72F9 (4MB) is configured as 512K x 72 bits, Both are packaged in a 168 pin dual–in–line
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MCM72F8/D
MCM72F8
256Kx72
MCM72F9
MCM72F8
MCM72F9
bQ54
111al2
Nippon capacitors
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PDF
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Untitled
Abstract: No abstract text available
Text: WEDPY256K72V-XBX 256Kx72 Synchronous Pipeline SRAM FEATURES DESCRIPTION Fast clock speed: 100, 133, 150, 166 and 200* MHz The WEDPY256K72V-XBX employs high-speed, low-power CMOS designs that are fabricated using an advanced CMOS process. The 16Mb Synchronous SRAMs integrate two 256K x 36 SRAMs
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WEDPY256K72V-XBX
256Kx72
WEDPY256K72V-XBX
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7410
Abstract: 7410E WED3C7410E16M-XBHX WED3C750A8M-200BX WED3C7558M-XBX 90Sn10Pb 63SN 37PB CBGA 255 motorola
Text: PowerPC 7410E AltiVec™/2M Byte SSRAM HiTCE™ Multi-Chip Package Optimum Density and Performance in One Package WED3C7410E16M-XBHX* Features Product Features • 7410 AltiVec™ µProcessor • 16 Mbit of Synchronous pipeline burst SRAM configured as 256Kx72 L2 Cache
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7410E
WED3C7410E16M-XBHX*
256Kx72
25x21mm,
625mm2
352mm2
1329mm2
525mm2
x64/x72
7410
WED3C7410E16M-XBHX
WED3C750A8M-200BX
WED3C7558M-XBX
90Sn10Pb
63SN 37PB
CBGA 255 motorola
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PDF
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256K DPRAM
Abstract: AN4028 CY2CC810 CYD18S72V CYD18S72V-133BBC SIGNAL PATH DESIGNER A18L
Text: Creating a 512K x 36 Dual-Port RAM from the 256Kx72 FLEx72 18-Mb Dual-Port RAM AN4028 Introduction The Cypress FLEx72™ 18-Mb Dual-Port RAM CYD18S72V is the industry’s first DP RAM with support for a 72-bit wide data bus and is organized in a 256K x 72 configuration. By
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256Kx72
FLEx72TM
18-Mb
AN4028
CYD18S72V)
72-bit
36-bit
256K DPRAM
AN4028
CY2CC810
CYD18S72V
CYD18S72V-133BBC
SIGNAL PATH DESIGNER
A18L
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PDF
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CI 7410
Abstract: 7410 frequency divider PIN CONFIGURATION 7410 cga motorola 7410 transistor 7410 PC7410 Multi-Chip Modules motorola
Text: PC7410 Microprocessor + 2MByte L2-Cache Multi-Chip Module Fact Sheet Main Features • • • • • • PC7410 RISC microprocessor 16 Mbit of Synchronous Pipelined Burst SRAM configured as 256Kx72 L2-Cache Extended temperature modules 1.8V (Core)/2.5V (I/0) for industrial and military applications
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PC7410
256Kx72
16Mbit
BP123
CI 7410
7410 frequency divider
PIN CONFIGURATION 7410
cga motorola
7410
transistor 7410
Multi-Chip Modules motorola
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PDF
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Untitled
Abstract: No abstract text available
Text: PowerPC 7410E AltiVec™/2M Byte SSRAM HiTCE™ Multi-Chip Package Optimum Density and Performance in One Package WED3C7410E16M-XBHX* Features Product Features • 7410 AltiVec™ µProcessor • 16 Mbit of Synchronous pipeline burst SRAM configured as 256Kx72 L2 Cache
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7410E
WED3C7410E16M-XBHX*
256Kx72
625mm2
352mm2
1329mm2
525mm2
x64/x72
WED3C7410HITCE
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PDF
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Untitled
Abstract: No abstract text available
Text: Preliminary 256Kx72 Pipelined NtRAMTM K7N167245A Document Title 256Kx72-Bit Pipelined NtRAMTM Revision History History Draft Date Remark 0.0 1. Initial document. April. 21. 2001 Preliminary 0.1 1. Add JTAG Scan Order May. 10. 2001 Preliminary Rev. No. The attached data sheets are prepared and approved by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right to c hange the
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K7N167245A
256Kx72-Bit
256Kx72
11x19
00x10
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dq35j
Abstract: CS11 CS21 CS22 WEDPY256K72V-XBX
Text: White Electronic Designs WEDPY256K72V-XBX 256Kx72 Synchronous Pipeline SRAM DESCRIPTION FEATURES The WEDPY256K72V-XBX employs high-speed, lowpower CMOS designs that are fabricated using an advanced CMOS process. The 16Mb Synchronous SRAMs integrate two 256K x 36 SRAMs into a single
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256Kx72
WEDPY256K72V-XBX
dq35j
CS11
CS21
CS22
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K7N167245A
Abstract: K7N167249A 326J
Text: Preliminary 256Kx72 Pipelined NtRAMTM K7N167245A Document Title 256Kx72-Bit Pipelined NtRAM TM Revision History Rev. No. 0.0 0.1 0.2 0.3 History Draft Date Remark 1. Initial document. 1. Add JTAG Scan Order 1. Upate DC characteristics icc,isb 1. Speed bin merge.
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256Kx72
K7N167245A
256Kx72-Bit
K7N167249A
K7N167245A.
11x19
K7N167245A
326J
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PLL VCO MIL-PRF-38535
Abstract: No abstract text available
Text: PC7410M16 RISC Microprocessor Multichip Package Datasheet - Preliminary Specification Features • • • • • • PC7410 RISC Microprocessor Dedicated 2 MB SSRAM L2 Cache, Configured as 256Kx72 21 mm x 25 mm, 255 Ceramic Ball Grid Array Maximum Core Frequency = 400 MHz
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PC7410M16
PC7410
256Kx72
PC7410M16
0879C
PLL VCO MIL-PRF-38535
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Untitled
Abstract: No abstract text available
Text: Preliminary 256Kx72 Pipelined NtRAMTM K7N167249A Document Title 256Kx72-Bit Pipelined NtRAMTM Revision History History Draft Date Remark 0.0 1. Initial document. April. 21. 2001 Preliminary 0.1 1. Add JTAG Scan Order May. 10. 2001 Preliminary Rev. No. The attached data sheets are prepared and approved by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right to c hange the
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K7N167249A
256Kx72-Bit
256Kx72
11x19
00x10
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Untitled
Abstract: No abstract text available
Text: White Electronic Designs 256Kx72 Synchronous Pipeline SRAM WEDPY256K72V-XBX Preliminary* FEATURES DESCRIPTION ! Fast clock speed: 100, 133, 150, 166 and 200* MHz The WEDPY256K72V-XBX employs high-speed, low-power CMOS designs that are fabricated using an advanced
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256Kx72
WEDPY256K72V-XBX
WEDPY256K72V-XBX
256K72
100MHz
133MHz
150MHz
166MHz
200MHZ
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K7Z163688B
Abstract: K7Z167288B WG A8 6D 03 Z WG A8 6D 05 Z
Text: K7Z167288B K7Z163688B Preliminary 512Kx36 & 256Kx72 DLW Double Late Write RAM Document Title 512Kx36 & 256Kx72 DLW(Double Late Write) RAM Revision History Rev. No. History Draft Date Remark 0.0 1. Initial document. Feb. 10, 2003 Preliminary 0.1 1. Correct the ZQ to programmable.
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K7Z167288B
K7Z163688B
512Kx36
256Kx72
K7Z163688B
K7Z167288B
WG A8 6D 03 Z
WG A8 6D 05 Z
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Untitled
Abstract: No abstract text available
Text: PowerPC 7410E AltiVec™/2M Byte SSRAM Multi-Chip Package Optimum Density and Performance in One Package WED3C7410E16M-XBX* Features Product Features • 7410 AltiVec™ µProcessor • 16 Mbit of Synchronous pipeline burst SRAM configured • as 256Kx72 L2 Cache
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7410E
WED3C7410E16M-XBX*
256Kx72
625mm2
352mm2
1329mm2
525mm2
x64/x72
W72M64V-XBX
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PDF
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K7N167249A
Abstract: No abstract text available
Text: Preliminary 256Kx72 Pipelined NtRAMTM K7N167249A Document Title 256Kx72-Bit Pipelined NtRAMTM Revision History Rev. No. 0.0 0.1 0.2 History Draft Date Remark 1. Initial document. 1. Add JTAG Scan Order 1. Upate DC characteristics icc,isb April. 21. 2001 May. 10. 2001
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256Kx72
K7N167249A
256Kx72-Bit
11x19
00x10
00x18
K7N167249A
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cga motorola
Abstract: WED3C750A8M-200BX 7410 7410E WED3C7410E16M-400BX TQFP 100 PACKAGE footprint we*400 Motorola PowerPC 7410 WED3C7410E16M-400 Multi-Chip Modules motorola
Text: PowerPC 7410E AltiVec™/2M Byte SSRAM Multi-Chip Package Optimum Density and Performance in One Package WED3C7410E16M-400BX* Features • • • • • A 400 MHz 7410 AltiVec™ µProcessor 16 Mbit of Synchronous pipeline burst SRAM configured as 256Kx72 L2 Cache
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7410E
WED3C7410E16M-400BX*
256Kx72
WED3C7410
MIF2009
cga motorola
WED3C750A8M-200BX
7410
WED3C7410E16M-400BX
TQFP 100 PACKAGE footprint
we*400
Motorola PowerPC 7410
WED3C7410E16M-400
Multi-Chip Modules motorola
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CS22
Abstract: dq35j fast sram 100mhz CS11 CS21 WEDPY256K72V-XBX DQ9-17
Text: WEDPY256K72V-XBX 256Kx72 Synchronous Pipeline SRAM Preliminary* FEATURES DESCRIPTION ! Fast clock speed: 100, 133, 150, 166 and 200* MHz The WEDPY256K72V-XBX employs high-speed, low-power CMOS designs that are fabricated using an advanced CMOS process. The 16Mb Synchronous SRAMs integrate two 256K
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WEDPY256K72V-XBX
256Kx72
WEDPY256K72V-XBX
CS22
dq35j
fast sram 100mhz
CS11
CS21
DQ9-17
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Untitled
Abstract: No abstract text available
Text: W PY256K72V-XMDC M/HITE /M ICROELECTRONICS 2MByte 256Kx72 Flow Through Synchronous SRAM Module ADVANCED* FEATURES • Fast A c c e s s T im e s : 8 , 1 0ns ■ B yte W r i t e a n d G lo b a l W r i t e C a p a b il it i e s ■ Fast OE A c c e s s T im e o f 4 ns
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OCR Scan
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PY256K72V-XMDC
256Kx72)
256KX72
128Kx36
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PDF
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dpi 602
Abstract: AO16 GW 94 H
Text: WP Y256K72V-XM DC M/HITE /MICROELECTRONICS 2MByte 256Kx72 Flow Through Synchronous SRAM Module AD VAN CED * FEATURES • F a s t A c c e s s T i m e s : 8, 1 0 n s ■ B y t e W r i t e and G lo b a l W r i t e C a p a b i l i t i e s ■ F a s t O E A c c e s s T i m e of 4 n s
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Y256K72V-XM
256Kx72)
128Kx18
168-pin
256Kx72;
128Kx72
128Kx36.
256KX72
128Kx36
dpi 602
AO16
GW 94 H
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