64-TQFP
Abstract: 144TQFP 44PQFP 144-TQFP
Text: TSI Family Products Cross Reference Guide IDT Part Number Available Packages Designation Mitel Cross (* Pin Compatible) Mitel Packages (Designation) IDT72V71660 208PQFP (DR), 208BGA (BF) IDT72V73260 144TQFP (DA), 144BGA (BB) IDT72V71650 144TQFP (DA), 144BGA (BB)
|
Original
|
PDF
|
IDT72V71660
IDT72V73260
IDT72V71650
IDT72V73250
IDT72V71643
IDT72V70840
IDT72V71623
IDT72V90823
IDT7290820
IDT72V70210
64-TQFP
144TQFP
44PQFP
144-TQFP
|
QL3004
Abstract: PLCC-84 QL3060 QL2003 QL2005 QL2007 QL2009 QL3012 QL3025 QL3040
Text: QuickSheet#4 pASIC FPGA Families High-Speed, Low Power, Instant-On, High Security FPGAs pASIC Family Highlights High performance over 400 MHz 100% routability and pin stability Instant-On capability High security and reliability Low power
|
Original
|
PDF
|
400MHz
QL1004-U1
1210JHGDA
QL3004
PLCC-84
QL3060
QL2003
QL2005
QL2007
QL2009
QL3012
QL3025
QL3040
|
Untitled
Abstract: No abstract text available
Text: QL2009 3.3V and 5.0V pASIC 2 FPGA Combining Speed, Density, Low Cost and Flexibility Rev. C pASIC 2 HIGHLIGHTS Ultimate Verilog/VHDL Silicon Solution -Abundant, high-speed interconnect eliminates manual routing -Flexible logic cell provides high efficiency and performance
|
Original
|
PDF
|
QL2009
|
smd M16
Abstract: smd marking w6 208-Pin CQFP 5962-0422 marking SMD Y12 SMD capacitor aa4 aa5
Text: Standard Products RadHard Eclipse FPGA Family 6250 and 6325 Advanced Data Sheet June 16, 2006 www.aeroflex.com/RadHardFPGA FEATURES Comprehensive design tools include high quality Verilog/ VHDL synthesis and simulation QuickLogic IP available for microcontrollers, DRAM
|
Original
|
PDF
|
16-bit
MIL-STD-883
120MeV-cm2/mg
smd M16
smd marking w6
208-Pin CQFP
5962-0422
marking SMD Y12
SMD capacitor aa4 aa5
|
Untitled
Abstract: No abstract text available
Text: Standard Products UT6325 RadTol Eclipse FPGA Data Sheet September 2008 www.aeroflex.com/FPGA Comprehensive design tools include high quality Verilog/ VHDL synthesis and simulation QuickLogic IP available for microcontrollers, DRAM controllers, USART and PCI
|
Original
|
PDF
|
UT6325
16-bit
MIL-STD-883
120MeV-cm2/mg
|
AT91SAM9260B-CU
Abstract: AT91SAM9260B-QU application note SAM9260
Text: Features • 180 MHz ARM926EJ-S ARM Thumb® Processor – 8 KBytes Data Cache, 8 KBytes Instruction Cache, MMU • Memories • • • • – 32-bit External Bus Interface supporting 4-bank SDRAM/LPSDR, Static Memories, CompactFlash, SLC NAND Flash with ECC
|
Original
|
PDF
|
ARM926EJ-STM
32-bit
32-kbyte
10-bit
6221KS
17-May-11
AT91SAM9260B-CU
AT91SAM9260B-QU application note
SAM9260
|
XC3030-70PC84C
Abstract: EPM5128LC EP330PC-15 A1020 transistor A1010B-PL68C EPM5128GM EP330PC15 EP330PC XC3042-70PC84C A1020A-PL84C
Text: ULCt Cross-Reference Matra MHS Cross reference list of devices supported for ULC conversion is not exhaustiv as new devices are added regularly. Additional devices not shown in this list, may also be supported. MHS encourages you to contact your local TEMIC sales representative
|
Original
|
PDF
|
A1010A-PL44C
A1010B-PL44C
ULC/A1010
44-PLCC
A1010A-PL44I
A1010B-PL44I
A1010A-1PL44C
A1010B-1PL44C
A1020A-1PL44C
XC3030-70PC84C
EPM5128LC
EP330PC-15
A1020 transistor
A1010B-PL68C
EPM5128GM
EP330PC15
EP330PC
XC3042-70PC84C
A1020A-PL84C
|
s134 p-mosfet
Abstract: 74hc260 Mitsumi D359T3 D359T3 schematic diagram inverter lcd monitor fujitsu 62256-10 BERG STRIP teac fd 235hf stepping motor mitsumi mitsumi floppy
Text: frt Page 1 Thursday, August 8, 1996 12:36 PM ÉlanSC300 Microcontroller Evaluation Board User’s Manual evalbd.book : frt Page 2 Thursday, August 8, 1996 12:14 PM ÉlanSC300 Microcontroller Evaluation Board, Revision 1.1 1996 by Advanced Micro Devices, Inc.
|
Original
|
PDF
|
lanSC300
s134 p-mosfet
74hc260
Mitsumi D359T3
D359T3
schematic diagram inverter lcd monitor fujitsu
62256-10
BERG STRIP
teac fd 235hf
stepping motor mitsumi
mitsumi floppy
|
Mitsumi D359T3
Abstract: D359T3 Video Card AVED AV540 mitsumi floppy d359* mitsumi SCHEMATIC TRIDENT VGA board EPROM AMD s134 p-mosfet stepping motor mitsumi 62256-10
Text: evalbd.book : frt Page 1 Thursday, August 8, 1996 2:34 PM ÉlanSC310 Microcontroller Evaluation Board User’s Manual evalbd.book : frt Page 2 Thursday, August 8, 1996 2:34 PM ÉlanSC310 Microcontroller Evaluation Board, Revision 1.0 1996 by Advanced Micro Devices, Inc.
|
Original
|
PDF
|
lanSC310
227ing
Mitsumi D359T3
D359T3
Video Card AVED AV540
mitsumi floppy
d359* mitsumi
SCHEMATIC TRIDENT VGA board
EPROM AMD
s134 p-mosfet
stepping motor mitsumi
62256-10
|
MT48LC8M16A2
Abstract: PC15 RTL8201BL header8 DB9_MALE AT45DB128
Text: Port C Pins assignment 104 PB22/SCK1 as UART1 RI Input 122 PB27/PCK0 as UART1 DTR (Output) ADDR12 not connected to U3,U4 ADDR13 connected to U3.A11,U4.A11 See Page 139 Man.rev.from 22-Aug-03 R11 10 C27 0.1uF R14 10 C30 0.1uF R18 10 C19 0.1uF VDDPLL PLLRCA
|
Original
|
PDF
|
XOUT32
XIN32
680pF
470pF
MAX3241E
MAX3243E
MAX3244E
MAX3245E
SP3243
IRU1117-18CY
MT48LC8M16A2
PC15
RTL8201BL
header8
DB9_MALE
AT45DB128
|
QL4090
Abstract: pASIC 1 Family 160CQFP 208-CQFP
Text: QL16x24B pASIC 1 Family Very-High-Speed CMOS FPGA Rev C pASIC HIGHLIGHTS …4,000 usable ASIC gates, 122 I/O pins Very High Speed – ViaLink metal-to-metal programmable–via antifuse technology, allows counter speeds over 150 MHz and logic cell delays of under 2 ns.
|
Original
|
PDF
|
QL16x24B
16-by-24
84-pin
100-pin
144-pin
160-pin
16-bit
V144-TQFP
QL24x32B
QL4090
pASIC 1 Family
160CQFP
208-CQFP
|
Untitled
Abstract: No abstract text available
Text: QL3040 pASIC 3 FPGA Data Sheet •••••• 40,000 Usable PLD Gate pASIC 3 FPGA Combining High Performance and High Density Device Highlights High Performance & High Density • 40,000 Usable PLD Gates with 252 I/Os • 300 MHz 16-bit Counters, 400 MHz Datapaths
|
Original
|
PDF
|
QL3040
16-bit
|
208CQFP
Abstract: No abstract text available
Text: QL2007 3.3V and 5.0V pASIC 2 FPGA Combining Speed, Density, Low Cost and Flexibility Rev. E pASIC 2 HIGHLIGHTS Ultimate Verilog/VHDL Silicon Solution -Abundant, high-speed interconnect eliminates manual routing -Flexible logic cell provides high efficiency and performance
|
Original
|
PDF
|
QL2007
-16-bit
l144-TQFP
QL24x32B
208-PQFP
208-CQFP
125oC
MIL-STD-883
208CQFP
|
208-PIN
Abstract: 456-PIN
Text: QL3060 - pASIC 3 FPGATM 60,000 Usable PLD Gate pASIC 3 FPGA Combining High Performance and High Density QL3060 - pASIC 3 FPGA DEVICE HIGHLIGHTS Device Highlights Device Highlights High Performance & High Density • 60,000 Usable PLD Gates with 316 I/Os ■ 16-bit counter speeds over 300 MHz, data path speeds over
|
Original
|
PDF
|
QL3060
16-bit
208-PIN
456-PIN
|
|
|
Untitled
Abstract: No abstract text available
Text: QL4058 QuickRAM Data Sheet • • • • • • 58,000 Usable PLD Gate QuickRAM ESP Combining Performance, Density and Embedded RAM Device Highlights Advanced I/O Capabilities • Interfaces with both 3.3 V and 5.0 V devices High Performance & High Density
|
Original
|
PDF
|
QL4058
16-bit
|
ADM5120
Abstract: DG33 1K BSC COMPUTER SCIENCE digital logic design Notes PIN assignments of UTP cables 324-PIN ADM5001 TXC 3127 GMAC fet 004h BUT23
Text: ADM5120 HOME GATEWAY CONTROLLER Datasheet Version 1.13 ADMtek.com.tw Information in this document is provided in connection with ADMtek products. ADMtek may make changes to specifications and product descriptions at any time, without notice. Designers must not rely on
|
Original
|
PDF
|
ADM5120
5ns/87
324-pin
208-pin
ADM5120
DG33 1K
BSC COMPUTER SCIENCE digital logic design Notes
PIN assignments of UTP cables
324-PIN
ADM5001
TXC 3127
GMAC
fet 004h
BUT23
|
A 434 RF Receiver TRANSMITTER PAIR
Abstract: AT45DB161B pam 8304 bcfk AUTOMATIC ROOM LIGHT CONTROLLER using ldr abstract AT91RM9200 SDRAM XC-01
Text: Features • Incorporates the ARM920T ARM Thumb® Processor • • • • • • • • • • • • • • • • – 200 MIPS at 180 MHz, Memory Management Unit – 16-KByte Data Cache, 16-KByte Instruction Cache, Write Buffer – In-circuit Emulator including Debug Communication Channel
|
Original
|
PDF
|
ARM920TTM
16-KByte
256-ball
ARM920T
1768B
A 434 RF Receiver TRANSMITTER PAIR
AT45DB161B
pam 8304
bcfk
AUTOMATIC ROOM LIGHT CONTROLLER using ldr abstract
AT91RM9200 SDRAM
XC-01
|
B272
Abstract: CLK32 H1672
Text: ispLSI 5256V In-System Programmable 3.3V SuperWIDE High Density PLD — Productivity Enhancing Timing Analyzer, Explore Tools, Timing Simulator and ispANALYZER™ — PC and UNIX Platforms Features • SuperWIDE™ HIGH-DENSITY IN-SYSTEM PROGRAMMABLE LOGIC
|
Original
|
PDF
|
272-BGA
208-PQFP
208-BGA
256V-125LB272
272-Ball
256V-125LQ208*
208-Pin
256V-125LB208*
208-Ball
256V-100LB272
B272
CLK32
H1672
|
A42 B331
Abstract: CA91C860B-40IQ CA91C860B-40CQ CA91C860B-50CQ tea 1601 t CA91C860B a44 b331 CA91C860 T337A CA91L860B-50CE
Text: QSpan CA91C860B, CA91L860B PCI to Motorola Processor Bridge Manual http://www.tundra.com The information in this document is subject to change without notice and should not be construed as a commitment by Tundra Semiconductor Corporation. While reasonable precautions have been taken, Tundra
|
Original
|
PDF
|
CA91C860B,
CA91L860B)
A42 B331
CA91C860B-40IQ
CA91C860B-40CQ
CA91C860B-50CQ
tea 1601 t
CA91C860B
a44 b331
CA91C860
T337A
CA91L860B-50CE
|
teradyne z1890
Abstract: Sis 968 ispMACH 4000 development circuit gal amd 22v10 22v10 pal gal programming 22v10 Pal programming 22v10 272-BGA GAL programming PALCE* programming
Text: L A T T I C E S E M I C O N D U C T Programmable Logic Devices O R “A vision of the ultimate system — Lattice provides the tools and analog, digital, and everything in support necessary to utilize each between, instantly re-programmable.” of these building blocks. The
|
Original
|
PDF
|
I0107A
teradyne z1890
Sis 968
ispMACH 4000 development circuit
gal amd 22v10
22v10 pal
gal programming 22v10
Pal programming 22v10
272-BGA
GAL programming
PALCE* programming
|
5256VA
Abstract: 5384VA 5512VA b09 n03
Text: ispLSI 5256VA In-System Programmable 3.3V SuperWIDE High Density PLD — Superior Quality of Results — Tightly Integrated with Leading CAE Vendor Tools — Productivity Enhancing Timing Analyzer, Explore Tools, Timing Simulator and ispANALYZER™ — PC and UNIX Platforms
|
Original
|
PDF
|
5256VA
5256VA-125LB272
272-Ball
5256VA-125LQ208
208-Pin
5256VA-125LB208
208-Ball
5256VA-100LB272
5256VA-100LQ208
5256VA
5384VA
5512VA
b09 n03
|
Untitled
Abstract: No abstract text available
Text: VAN T I S BE Y O N D PERFORMANCI-, Product Menu An AMD .om pan \ HIGHLIGHTS MACH 1 -5 CPLD Families Fastest speeds; Easiest-to-Use SpeedLocking (Fixed, Guaranteed Timing 3 2-51 2 Macrocells; 32-256 l/Os JTAG-ISP; 3 .3 -V or 5 -V Solutions PCI-Compliance at 5, 7, 10 and 12ns
|
OCR Scan
|
PDF
|
1-888-VANTIS2
CPI-9M-8/98-0
10253U
|
Untitled
Abstract: No abstract text available
Text: PRELIMINARY BEYOND PERFORMANCE VANTI S VF1 FIELD PROGRAMMABLE GATE ARRAY FEATURES AND BENEFITS ♦ The industry's first Variable-Grain-Architecture enables high-density, high-performance designs for a wide range of applications — Architecture adapts to logic to enable synthesis-friendly, high-performance designs
|
OCR Scan
|
PDF
|
CPI-2M-6/98-1
2106A
1-888-VANTIS2
|
Untitled
Abstract: No abstract text available
Text: GT-64060 IBBIBk « Galileo !»; Technology High-lntegration PCI Bridge/ Memory Controller P roduct Preview R evision 0.7 4/1/97 Please contact Galileo Technology for possible updates before finalizing a design. FEATURES • High-integration PCI bridge/memory controller with
|
OCR Scan
|
PDF
|
GT-64060
32-bit
50MHz
150Mbytes/sec
512MB
256KB-16MB
R2000/3000
|