16VCC Search Results

16C954

Abstract: OX16C952 16C952 Oxford Semiconductor 16c550 16C550 16C950 IEEE1284 OX16C950 OXMPCI952-LQAG
Contextual Info: OXmPCI952 DATA SHEET Integrated High Performance Dual UARTs, 8-bit Local Bus/Parallel Port. 3.3v PCI/miniPCI interface. FEATURES • • • • • • • • • • • • Dual 16C950 High performance UART channels 8-bit Pass-through Local Bus PCI Bridge

TXC10 M 60

Abstract: 10BASE2 10BASE5 93LC46B FPT-144P-M08 MB86961A MB86974 NM93C46
Contextual Info: PAUSE FLOW CONTROL 10Mb/s-/100Mb/s Ethernet Controller MB86974 Package • 144-pin, plastic QFP • FPT-144P-M08 Description The Fujitsu MB86974 is a high-quality Ethernet controller that offers many benefits and advantages to its users. The controller operates at either 100-Mbit/s or 10-Mbit/s, and

rx2 99

Abstract: 93c46l 93c46li 16C550 AD29 AD30 XR17V258 bu 515 144LQFP 16550
Contextual Info: XR17V258 66MHZ PCI BUS OCTAL UART WITH POWER MANAGEMENT SUPPORT AUGUST 2010 REV. 1.0.2 GENERAL DESCRIPTION The XR17V2581 V258 is a single chip 8-channel 66MHz PCI (Peripheral Component Interconnect) UART (Universal Asynchronous Receiver and Transmitter)

Contextual Info: V320USC Universal System Controller • • • • • • PCI System Controller for 32-Bit MIPS and SuperH™ System Interface Device Highlights Introduction • Glueless interface between popular MIPS™ and SuperH™ processors and the standard 32-bit PCI

54SX32

Abstract: A54SX32 A54SX32A A54SX72A PAR64 REQ64 54SX32A il 074
Contextual Info: Preliminary v1.0 HiRel SX-A Family FPGAs Le a di n g E d ge P er f o r m a n ce • QML Certified Devices • 215 MHz System Performance Military Temperature • 100% Military Temperature Tested (–55°C and +125°C) • 5.3ns Clock-to-Out (Pin-to-Pin) (Military Temperature)

Contextual Info: M IT S U B IS H I M ICRO CO M PUTERS M 37409P S S PIGGYBACK for M 3 7 4 0 9 M 2 -X X X S P DESCRIPTION FEATURES Th e M 3 7 4 0 9 P S S is an E P R O M m o u n ted -typ e m icrocom pu­ • te r which utilizes C M O S technology, and is d e s ig n e d for 1

AD27

Abstract: AD29 V320USC V320USC-75 AD1485
Contextual Info: DS-UC01-0102.fm Page 1 Wednesday, June 30, 1999 7:30 PM Datasheet V320USC Universal System Controller PCI System Controller for 32-Bit MIPS and SuperH™ System Interface • Glueless interface between popular MIPS™ and SuperH™ processors and the standard 32-bit PCI bus

Contextual Info: r z 7 Ä T # S C S -T H O M S O N M iM H IL iim « ! TL064 T L 0 6 4 A -T L 0 6 4 B LOW POWER J-FET INPUT QUAD OP-AMPs • VERY LOW POWER CONSUMPTION ■ WIDE COMMON-MODE AND DIFFERENTIAL VOLTAGE RANGES ■ LOW INPUT BIAS AND OFFSET CURRENTS ■ TYPICAL SUPPLY CURRENT : 200 pA

TP2G

Abstract: BPV32 5w100 TOSHIBA MARK C56 CSB503F30 PB001 PB111 TA1310N LF 256H T26G
Contextual Info: TOSHIBA TENTATIVE TA1310N TOSHIBA BIPOLAR LINEAR INTEGRATED CIRCUIT SILICON MONOLITHIC T A 1 3 1 ON NTSC VIDEO, CHROMA, DEFRECTION, AND DEC. DISTORTION COMPENSATION IC FOR YUV INTERFACE TA1310N is Video Chroma and defrection signal. Processing IC for NTSC. On a 56-pin shrink DIP package.

TDA 7378

Abstract: TDA 7822 block diagram baugh-wooley multiplier tda 12062 equivalent for tda 4858 ic free transistor equivalent book STD-80 4856 a 14 PIN DIP W908 LSI CMOS Technology
Contextual Info: D • A • T • A • B • O • O • K STD80/STDM80 0.5µm 5V/3.3V Standard Cell Library April 1997 V SAMSUNG SAMSUNG ASIC STD80/STDM80 0.5µm 5V/3.3V Standard Cell Library Data Book  1997 Samsung Electronics Co., Ltd. All rights reserved. No part of this document may be reproduced, in any form or by any means, without the prior

M37702M4-XXXFP

Abstract: m37702s4bfp M37702M4B
Contextual Info: M IT S U B IS H I M IC RO CO M PUTERS M 3 7 7 0 2 M 4 A X X X F P ,M 3 7 7 0 2 M 4 B X X X F P M 3 7 7 0 2 S 4 A F P ,M 3 7 7 0 2 S 4 BF P M l7702S 4FP aÎeF œasnpectively unified into M37702M4AXXXFP and M37702S4AFP. “ , iw a w a m w A h W -w » • ■

M37450M

Abstract: M37450M8-XXXSP MELPS-740 M37450
Contextual Info: M IT S U B IS H I M ICRO CO M PUTERS M 3 7 4 5 0 M 2 -X X X S P /F P ,M 3 7 4 5 0 M 4 -X X X S P /F P M 3 7 4 5 0 M 8 -X X X S P /F P S IN G L E -C H IP 8 -B IT CM O S M IC R O C O M P U T E R DESCRIPTION The M 37450M 2-XX X S P/FP is a s in g le -c h ip m icro com p uter

M37415

Abstract: M37415M4 M37415M4XXXFP M37415M4-XXXFP ara bbc S52H
Contextual Info: M IT S U B IS H I M IC RO CO M PUTERS M 37415M 4-XXXFP S IN G L E -C H IP 8 -B IT CMOS M IC R O C O M P U T E R DESCRIPTION PIN CONFIGURATION TOP VIEW The M 37415M 4-XXXFP is a s in g le -c h ip m icro com p uter d e ­ sig n e d w ith C M O S s ilicon ga te technology. It is housed in a

M37702M8L

Contextual Info: M IT S U B IS H I M IC RO CO M PUTERS M 37702M 8LXXXHP S IN G L E -C H IP 1 6-B IT CM O S M IC R O C O M P U T E R DESCRIPTION The M37702M8LXXXHP is a single-chip 16-bit micro­ computer designed with high-performance CMOS silicon PIN CONFIGURATION TOP VIEW

Contextual Info: MITSUBISHI MICROCOMPUTERS M 37703M 2AXXXSP.M 37703M 2BXXXSP M37703S1ASP,M37703S1BSP M 3 7 7 0 3 M 2 -X X X S P and SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER DESCRIPTION PIN CONFIGURATION TOP VIEW T h e M 3 7 7 0 3 M 2 A X X X S P is a sin g le -ch ip m icrocom puter d e ­

38002E4SP

Contextual Info: M IT S U B IS H I M IC RO CO M PUTERS 3800 Group S IN G L E -C H IP 8 -B IT C M O S M IC R O C O M P U T E R DESCRIPTION FEATURES The 3800 group is the 8-bit microcomputer based on the 740 family core technology. • • The 3800 group is designed for office automation equip­

Contextual Info: 54SXFamily FPGAs Leadi ng Edge P e r f o r m a nc e • • 320 MHz Internal Performance • 3.3VOperation with 5.0YInput Tolerance • 3.7 ns Qock-to-Out Pin-to-Pin • • 0.1ns Input Set-Up • Deterministic, Ufcer-Controllable Timing • 0.25 ns d o c k Skew

M37700M

Contextual Info: MITSUBISHI MICROCOMPUTERS M 37704M 2A XXXFP M37704M2-XXXFP and M37704S1FP are respectively unified into M37704M2AXXXFP and M37704S1AFP. |U |5 Iw iw 7 7 a a 4 S 1 A F P S IN G L E -C H IP 1 6 -B IT CM O S M IC R O C O M P U T E R DESCRIPTION APPLICATION The M37704M2AXXXFP and M37704S1AFP are single-chip

ic 74 LS 138 DECODER data sheet

Abstract: 16C550 XR17C154 XR17C158 XR17L154
Contextual Info: áç XR17L154 3.3V PCI BUS QUAD UART OCTOBER 2002 REV. 1.0.0 FEATURES GENERAL DESCRIPTION The XR17L1541 L154 is a quad PCI Bus Universal Asynchronous Receiver and Transmitter (UART) with same package and pin-out as the Exar XR17C158 octal UART. The device is designed to meet today’s

application notes of TF 513

Abstract: PHSOSCK17 PHSOSCK27 STD130
Contextual Info: INPUT CLOCK DRIVERS Cell List Cell Name Function Description PSCKDC 2/4/6/8 1.8V CMOS Level Input Clock Driver PSCKDCD(2/4/6/8) 1.8V CMOS Level Input Clock Driver with Pull-Down PSCKDCU(2/4/6/8) 1.8V CMOS Level Input Clock Driver with Pull-Up PSCKDS(2/4/6/8)

CL 2181

Abstract: SL 1088 PHSOSCK17 PHSOSCK27
Contextual Info: INPUT CLOCK DRIVERS Cell List Cell Name Function Description PSCKDC 2/4/6/8 1.8V CMOS Level Input Clock Driver PSCKDCD(2/4/6/8) 1.8V CMOS Level Input Clock Driver with Pull-Down PSCKDCU(2/4/6/8) 1.8V CMOS Level Input Clock Driver with Pull-Up PSCKDS(2/4/6/8)

TDA 9361 PS

Abstract: tda 2974 LD5Q ci 8602 gn block diagram TDA 2265 5.1 AUDIO AMP TDA 2030 TDA 7877 TDA 0200 circuit TDA 9594 TDA 2088
Contextual Info: V S MSUNG STD130 ELECTRONICS STD130 Standard Cell 0.18um System-On-Chip ASIC Dec 2000, V2.0 Features 1.8/2.5/3.3V - Leff= 0.15um, Ldrawn = 0.18um Device - Up to 23 million gates - Power dissipation :24nW/MHz 3.3/5.0V - Gate Delay : 48ps @ 1.8V, 1SL Device

HiRel a54sx72a unused

Contextual Info: Advanced v1.3 RT54SX-S RadTolerant FPGAs for Space Applications Sp e ci a l F ea t ur es f o r Sp a ce • First Actel FPGA Designed Specifically for Space Applications • Up to 2,012 SEU Hardened Flip-Flops Eliminate Software TMR Necessity LET th > 40, GEO SEU Rate < 10–10

rt54sx32su

Abstract: RTSX72 RTSX32SU RTSX72-S
Contextual Info: Advanced v0.1 RTSX-SU RadTolerant FPGAs UMC u e Designed for Space • • • • • SEU-Hardened Registers Eliminate the Need to Implement Triple-Module Redundancy (TMR) – Immune to Single-Event Upsets (SEU) to LETth > 40 MeV-cm2/mg, – SEU Rate < 10–10 Upset/Bit-Day in Worst-Case