WED3C750A8M-200BX
Abstract: No abstract text available
Text: PowerPC 750 /8Mbit SSRAM Multi-Chip Package Optimum Density and Performance in One Package WED3C7508M-200BX Features • • • A 200 MHz 750 RISC µProcessor 8 Mbit of Synchronous pipeline burst SRAM configured as 128Kx72 L2 Cache Extended temperature modules for industrial and military applications
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750TM/8Mbit
WED3C7508M-200BX
128Kx72
WED3C750A
WED3C7558M-300BX
WED3C750A8M-200BX*
WEDPN8M72V-XBX*
750sbd
WED3C750A8M-200BX
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sram 1mbyte 3.3v
Abstract: 16x16 bga Multi-Chip Package MEMORY TQFP 100 PACKAGE footprint with or without underfill PC755B PCX755B
Text: PC755B Microprocessor + 1MByte L2-Cache Multi-Chip Module Fact Sheet Main Features • PC755B RISC microprocessor • 8 Mbit of Synchronous Pipelined Burst SRAM configured as 128Kx72 L2-Cache • Extended temperature modules 2.0V (Core)/3.3V (I/0) for industrial and military applications
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PC755B
128Kx72
PCX745BVZFUxxxLE
PC7410M16MGxxxLE
PCX755B
BP123
sram 1mbyte 3.3v
16x16 bga
Multi-Chip Package MEMORY
TQFP 100 PACKAGE footprint
with or without underfill
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ATMEL 322
Abstract: atmel 711 PC755B
Text: 3& 0LFURSURFHVVRU 0%\WH /&DFKH 0XOWL&KLS 0RGXOH DFW 6KHHW 0DLQ )HDWXUHV • PC755B RISC microprocessor • 8 Mbit of Synchronous Pipelined Burst SRAM configured as 128Kx72 L2-Cache) • Extended temperature modules 2.0V (Core)/3.3V (I/0) for industrial and military applications
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PC755B
128Kx72
PCX745BVZFUxxxLE
PC7410M16MGxxxLE
PCX755B
BP123
ATMEL 322
atmel 711
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WED3C7508M-200BX
Abstract: WED3C750A8M-200BX WEDPN8M72V-XBX
Text: PowerPC 750 /8Mbit SSRAM Multi-Chip Package WED3C750A8M Product Sheet Rev. 1 5/01 Optimum Density and Performance in One Package WED3C7508M-200BX Features • • • A 200 MHz 750 RISC µProcessor 8 Mbit of Synchronous pipeline burst SRAM configured as 128Kx72 L2 Cache
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750TM/8Mbit
WED3C750A8M
WED3C7508M-200BX
128Kx72
25x21mm,
525mm
WED3C750A
625mm2
352mm2
1329mm2
WED3C750A8M-200BX
WEDPN8M72V-XBX
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Untitled
Abstract: No abstract text available
Text: SM372EBSFN3XGXX December 1995 Rev 0 SMART Modular Technologies SM372EBSFN3XGXX 1MByte 128Kx72 Synchronous Secondary Cache SRAM Module General Description Features The SM372EBSFN3XGXX is a high performance, 1 Megabyte synchronous secondary cache SRAM module.
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SM372EBSFN3XGXX
128Kx72)
SM372EBSFN3XGXX
168-pin,
64Kx18
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with or without underfill
Abstract: WED3C7410E16M-400BX WED3C750A8M-200BX WED3C7558M-XBX WED3C755E8M-XBX 21mmx25mm
Text: PowerPC 755E/8Mbit SSRAM Multi-Chip Package Optimum Density and Performance in One Package WED3C755E8M-XBX Features • 300 or 350 MHz 755E Rev RISC µProcessor • 8 Mbit of Synchronous pipeline burst SRAM configured as 128Kx72 L2 Cache • Extended temperature modules 2.0V (Core)/3.3V (I/0) for
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755E/8Mbit
WED3C755E8M-XBX
128Kx72
25x21mm,
525mm2.
WED3C755E8M-XBX
x64/x72
WED3C755E8M
MIF2032
with or without underfill
WED3C7410E16M-400BX
WED3C750A8M-200BX
WED3C7558M-XBX
21mmx25mm
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WED3C750A8M-200BX
Abstract: No abstract text available
Text: WED3C750A8M-200BX HI-RELIABILITY PRODUCT RISC Microprocessor Module PRELIMINARY* OVERVIEW The WED3C750A8M-200BX is offered in industrial -40°C to +85°C and military (-55°C to +125°C) temperature ranges and is well suited for embedded applications such as missiles, aerospace, flight
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WED3C750A8M-200BX
WED3C750A8M-200BX
750/SSRAM
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CY7C1304V25
Abstract: No abstract text available
Text: 5 CY7C1304V25 Advanced Information 9-Mb Pipelined SRAM with QDR Architecture Features Functional Description • Separate Independent Read and Write Data Ports — Supports concurrent transactions • 167 MHz Clock for High Bandwidth — 2.5 ns Clock-to-Valid access time
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CY7C1304V25
CY7C1304V25
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MPC755
Abstract: WED3C750A8M-200BX WED3C7558M-XBX WED3C755E8M-XBX
Text: White Electronic Designs WED3C755E8M-XBX RISC MICROPROCESSOR MULTI-CHIP PACKAGE OVERVIEW FEATURES The WEDC 755E/SSRAM multichip package is targeted for high performance, space sensitive, low power systems and supports the following power management features:
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WED3C755E8M-XBX
755E/SSRAM
WED3C755E8M-XBX
MPC755
WED3C750A8M-200BX
WED3C7558M-XBX
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CY7C1304V25
Abstract: No abstract text available
Text: 304V25 CY7C1304V25 Advanced Information 9-Mb Pipelined SRAM with QDR Architecture Features Functional Description • Separate Independent Read and Write Data Ports — Supports concurrent transactions • 167 MHz Clock for High Bandwidth — 2.5 ns Clock-to-Valid access time
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304V25
CY7C1304V25
CY7C1304V25
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bwh series
Abstract: ECHO schematic diagrams
Text: MITSUBISHI LSIs 2001.May Rev.0.1 M5M5Y5672TG – 25,22,20 Advanced Information Notice: This is not final specification. Some parametric limits are subject to change. 18874368-BIT 262144-WORD BY 72-BIT NETWORK SRAM DESCRIPTION The M5M5Y5672TG is a family of 18M bit synchronous SRAMs
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M5M5Y5672TG
18874368-BIT
262144-WORD
72-BIT)
M5M5Y5672TG
262144-words
72-bit.
bwh series
ECHO schematic diagrams
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BE5L
Abstract: CYD18S18V18 CYD09S36V18 CYD18S36V18 SKR 175 FullFlex36
Text: FullFlex FullFlex Synchronous SDR Dual Port SRAM Features Functional Description • True dual port memory enables simultaneous access to the shared array from each port ■ Synchronous pipelined operation with Single Data Rate SDR operation on each port
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Untitled
Abstract: No abstract text available
Text: Advance Information IDT71T6480H 9Mb Pipelined QDR SRAM Burst of 4 Features ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ Description 9Mb Density 512K x 18 Separate Independent Read and Write Data Ports — Supports concurrent transactions
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IDT71T6480H
x4033
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FullFlex36
Abstract: No abstract text available
Text: FullFlex FullFlex Synchronous DDR Dual-Port SRAM Features • True dual-ported memory allows simultaneous access to the shared array from each port • Synchronous pipelined operation with selectable Double Data Rate DDR or Single Data Rate (SDR) operation on each port
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36-Gb/s
484-ball
256-ball
FullFlex72
CYDD36S72V18)
CYDD18S72V1t
27mmx27mmx2
36Mx36
36Mx18
FullFlex36
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FullFlex36
Abstract: No abstract text available
Text: FullFlex FullFlex Synchronous DDR Dual-Port SRAM Features • True dual-ported memory allows simultaneous access to the shared array from each port • Synchronous pipelined operation with selectable Double Data Rate DDR or Single Data Rate (SDR) operation on each port
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36-Gb/s
484-ball
256-ball
FullFlex72
CYDD36S72V18)
CYDD18S72V1mation
27mmx27mmx2
36Mx36
36Mx18
FullFlex36
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CY7C1304V25
Abstract: No abstract text available
Text: CY7C1304V25 9-Mb Pipelined SRAM with QDR Architecture Features Functional Description • Separate independent Read and Write data ports — Supports concurrent transactions • 167 MHz Clock for high bandwidth — 2.5 ns Clock-to-Valid access time • 4-Word burst for reducing address bus frequency
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CY7C1304V25
CY7C1304V25
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Untitled
Abstract: No abstract text available
Text: a WY128K72V-XG5X WHITE /MICROELECTRONICS 128Kx72 Synchronous Flow Through SRAM MODULE ad van ced * FEATURES • Fast A cc e ss Tim e s of 10 and 11ns ■ Flo w th ro u g h Data Bus ■ Fast OE A cce s s T im e of 5ns ■ C o m m e rc ial, Industrial and M i l i t a r y T e m p e r a tu re Ranges
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WY128K72V-XG5X
128Kx72
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IC 4047 BE pin diagram
Abstract: IC 4047 pin diagram
Text: EDI2AL72128V m x 128Kx72 Flow Through Synchronous Burst SRAM ELECTRONIC DESIGNS INC ADVANCED 128Kx72, 3.3V, Flow Through Synchronous Burst SRAM Features The EDI2AL72128VxxLC is a 3.3V, 9 megabit synchronous RISC Microprocessor Memory Solution SRAM constructed with two 128K x 36 die mounted on a multi
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EDI2AL72128V
128Kx72
128Kx72,
EDI2AL72128VxxLC
EDI2AL72128V
IC 4047 BE pin diagram
IC 4047 pin diagram
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PDF
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Untitled
Abstract: No abstract text available
Text: a WY128K72V-XG5X WHITE /MICROELECTRONICS 128Kx72 Synchronous Flow Through SRAM MODULE advanced* FEATURES • Fast A cc e ss Tim e s of 10 and 11ns ■ Flo w th ro u g h Data Bus ■ Fast OE A cce s s T im e of 5ns ■ C o m m e rc ial, Industrial and M i l i t a r y T e m p e r a tu re Ranges
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OCR Scan
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WY128K72V-XG5X
128Kx72
Pin8K72V-XG5X
128KX72
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PDF
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Untitled
Abstract: No abstract text available
Text: M EDI2AL72128V U 128Kx72 Flow Through Synchronous Burst SRAM ELECTRONIC DESIGNS INC ADVANCED 128Kx72, 3.3V, Flow Through Synchronous Burst SRAM Features The EDI2AL72128VxxLC is a 3.3V, 9 megabit synchronous RISC Microprocessor Memory Solution SRAM constructed with two 128K x 36 die mounted on a multi
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EDI2AL72128V
128Kx72
128Kx72,
EDI2AL72128VxxLC
const11
EDI2AL72128V85U
I2AL72128V1
MO-143
EDI2AL72128V
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TJ77T
Abstract: WY128K72V-XG5X
Text: YZA WHITE /MICROELECTRONICS WY128K72V-XG5X 128Kx72 Synchronous Flow Through SRAM MODULE advan ced * FEATURES • Fast A c c e s s T i m e s o f 10 a nd 11 ns ■ F l o w t h r o u g h D at a Bus ■ Fast OE A c c e s s T i m e o f 5ns ■ C o m m e r c i a l , I n d u s tr i a l a nd M i l i t a r y T e m p e r a t u r e Rang es
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WY128K72V-XG5X
128Kx72
128KX72
TJ77T
WY128K72V-XG5X
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PDF
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9261A
Abstract: CYM9260 CYM9263 PM44 9261
Text: fax id: 2042 3g~ yr pyprfs^ PRELIMINARY CYM9260 CYM9261A/B CYM9262A/B CYM9263 64K x 72 SRAM 128K x 72 SRAM 256K x 72 SRAM 512K x 72 SRAM Features Module Module Module Module 9262B, 9263 SRAM’s in plastic surface mount packages on an epoxy laminate board with pins. The modules are designed
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CYM9260
CYM9261A/B
CYM9262A/B
CYM9263
18/128K
168-position
CYM9260,
CYM9261,
CYM9262
CYM9263
9261A
PM44
9261
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PDF
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9261A
Abstract: No abstract text available
Text: fax id: 2042 3g~ yr pyprfs^ PRELIMINARY CYM9260 CYM9261A/B CYM9262A/B CYM9263 64K x 72 SRAM 128K x 72 SRAM 256K x 72 SRAM 512K x 72 SRAM Features • Operates at 50 MHz. • Uses 64K x 1 8 /1 28K x 18 or 256K x 18 high perform ance synchronous SRAMs. • 168-position Angled DIMM from Amp p/n 179508-2
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CYM9260
CYM9261A/B
CYM9262A/B
CYM9263
168-position
CYM9260,
CYM9262
CYM9263
9262B,
9261A
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PDF
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Untitled
Abstract: No abstract text available
Text: IBM14N1372 IBM14N3272 IBM14N6472 High Perform ance SRAM Modules Features • 256K, 512K, and 1MB secondary cache module family using Synchronous and Asynchronous SRAMs. • Organized as a 32K, 64K, or 128K x 72 package on a 4.3” x 1.1”, 160-lead, Dual Read-out DIMM
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IBM14N1372
IBM14N3272
IBM14N6472
160-lead,
i486/PentiumTM
50MHz
66MHz
256KB,
512KB,
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