Untitled
Abstract: No abstract text available
Text: 19-2726; Rev 1; 2/03 3.3V, 16-Bit, 500Msps High Dynamic Performance DAC with Differential LVDS Inputs ♦ Excellent SFDR and IMD Performance SFDR = 76dBc at fOUT = 40MHz to Nyquist IMD = -85dBc at fOUT = 10MHz ACLR = 73dB at fOUT = 61MHz ♦ 2mA to 20mA Full-Scale Output Current
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16-Bit,
500Msps
MAX5888
76dBc
40MHz.
250mW.
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MAX5633AECB
Abstract: No abstract text available
Text: 19-2171; Rev 1; 6/02 16-Bit DACs with 32-Channel Sample-and-Hold Outputs _Applications MEMS Mirror Servo Control ♦ Integrated 16-Bit DAC and 32-Channel SHA with SRAM and Sequencer ♦ 32 Voltage Outputs ♦ 0.005% Output Linearity
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16-Bit
32-Channel
32-Channel
MAX5631
MAX5632
MAX5633
MAX5631AECB
-40oC
MAX5631AEGK
MAX5633AECB
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56us
Abstract: OC192 MAX3953 MAX3953UGK MAX3970 MAX3971A PDO11 VCO at 15GHZ PDO15 PDO14
Text: 19-2624; Rev 0; 10/02 10Gbps 1:16 Deserializer with Clock Recovery Features ♦ Serial Data Rate: 9.953Gbps/10.3125Gbps ♦ Clock Recovery with 1:16 Demultiplexer ♦ 0.75UIP-P High-Frequency Jitter Tolerance ♦ 16-Bit Parallel LVDS Output ♦ OIF-Compliant Parallel Interface
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10Gbps
953Gbps/10
3125Gbps
75UIP-P
16-Bit
100mVP-P
MAX3953
rate/64
rate/16
10x10x09
56us
OC192
MAX3953UGK
MAX3970
MAX3971A
PDO11
VCO at 15GHZ
PDO15
PDO14
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GORE-89
Abstract: GORE TWINAX CABLE
Text: 19-2289; Rev 0; 1/02 KIT ATION EVALU E L B A AVAIL 3.2Gbps Quad Adaptive Cable Equalizer with Cable Driver Features ♦ Single 3.3V Operation ♦ Four Independent Equalizers and Drivers ♦ 725mW at 3.3V Typical Power Dissipation ♦ Data Rates Up to 3.2Gbps
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725mW
MAX3802
MAX3802
10x10x09
GORE-89
GORE TWINAX CABLE
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MAX3782
Abstract: MAX3782UGK RDAT212 15k resistor
Text: 19-2268; Rev 2; 1/03 Dual 1.25Gbps Transceiver ♦ CML Interface Exceeds all PECL AC Specifications for 1000Base-SX/LX, GBIC, or SFP Serial Data ♦ Tx Data Retiming with <0.1UI Total Output Jitter as per IEEE802.3z ♦ Rx Data and Clock Recovery with 0.75UI Jitter
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PDF
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25Gbps
1000Base-SX/LX,
IEEE802
MAX3782UGK
G6800-4
MAX3782
MAX3782
MAX3782UGK
RDAT212
15k resistor
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equalizer circuit diagram
Abstract: monitor cable diagram 20 band equalizer equalizer diagram and function MAX3800 MAX3802 MAX3802UGK RG179 CML50 madison cable 68 pin
Text: 19-2289; Rev 0; 1/02 KIT ATION EVALU E L B A AVAIL 3.2Gbps Quad Adaptive Cable Equalizer with Cable Driver Features ♦ Single 3.3V Operation ♦ Four Independent Equalizers and Drivers ♦ 725mW at 3.3V Typical Power Dissipation ♦ Data Rates Up to 3.2Gbps
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Original
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PDF
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725mW
10x10x09
MAX3802
equalizer circuit diagram
monitor cable diagram
20 band equalizer
equalizer diagram and function
MAX3800
MAX3802
MAX3802UGK
RG179
CML50
madison cable 68 pin
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MAX5886
Abstract: MAX5887 MAX5888 MAX5888AEGK MAX5888EGK
Text: 19-2726; Rev 2; 3/03 3.3V, 16-Bit, 500Msps High Dynamic Performance DAC with Differential LVDS Inputs ♦ Single 3.3V Supply Operation ♦ Excellent SFDR and IMD Performance SFDR = 76dBc at fOUT = 40MHz to Nyquist IMD = -85dBc at fOUT = 10MHz ACLR = 73dB at fOUT = 61MHz
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Original
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PDF
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16-Bit,
500Msps
76dBc
40MHz
-85dBc
10MHz
61MHz
130mW
68-Lead
MAX5888AEGK
MAX5886
MAX5887
MAX5888
MAX5888AEGK
MAX5888EGK
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Untitled
Abstract: No abstract text available
Text: 19-2268; Rev 0; 3/02 Dual 1.25Gbps Transceiver ♦ CML Interface Exceeds all PECL AC Specifications for 1000Base-SX/LX, GBIC, or SFP Serial Data ♦ Tx Data Retiming with <0.1UI Total Output Jitter Beats IEEE802.3z Requirements ♦ Rx Data and Clock Recovery with 0.75UI Jitter
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Original
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25Gbps
MAX3782
1000Base-SX/LX
3z-2000)
10x10x09
MAX3782
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MAX3782
Abstract: MAX3782UGK RDAT212 SFP LVDS RX1 receiver
Text: 19-2268; Rev 1; 5/02 Dual 1.25Gbps Transceiver ♦ CML Interface Exceeds all PECL AC Specifications for 1000Base-SX/LX, GBIC, or SFP Serial Data ♦ Tx Data Retiming with <0.1UI Total Output Jitter as per IEEE802.3z ♦ Rx Data and Clock Recovery with 0.75UI Jitter
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Original
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PDF
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25Gbps
1000Base-SX/LX,
IEEE802
MAX3782UGK
MAX3782
MAX3782
MAX3782UGK
RDAT212
SFP LVDS
RX1 receiver
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