transistor marking WC 2C
Abstract: E22/6/AS7620/TMS320C6678/AS7620/NZT6728-datasheet
Text: TMS320C6678 SPRS691E—November 2010—Revised March 2014 Multicore Fixed and Floating-Point Digital Signal Processor Check for Evaluation Modules EVM : TMS320C6678 1 TMS320C6678 Features and Description 1.1 Features • Eight TMS320C66x DSP Core Subsystems (C66x
|
Original
|
TMS320C6678
SPRS691Eâ
TMS320C6678
TMS320C66xâ
4096KB
transistor marking WC 2C
E22/6/AS7620/TMS320C6678/AS7620/NZT6728-datasheet
|
PDF
|
Untitled
Abstract: No abstract text available
Text: 66AK2E05, 66AK2E02 SPRS865B—June 2013—Revised January 2014 Multicore DSP+ARM KeyStone II System-on-Chip SoC 1 66AK2E05/02 Features and Description • ARM Cortex -A15 MPCore™ CorePac – Up to Four ARM Cortex-A15 Processor Cores at up to 1.4-GHz
|
Original
|
66AK2E05,
66AK2E02
SPRS865Bâ
66AK2E05/02
Cortex-A15
Cortex-A15
TMS320C66xâ
|
PDF
|
Untitled
Abstract: No abstract text available
Text: TAS3103 Digital Audio Processor With 3D Effects Data Manual February 2004 Digital Audio Solutions SLES038C IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries TI reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue
|
Original
|
TAS3103
SLES038C
|
PDF
|
TMS320C6678ACYP
Abstract: TMS320C6678CYP TMS320C6678XCYP TMS320C6678CYPA TMS320C6678XCYPA
Text: TMS320C6678 Multicore Fixed and Floating-Point Digital Signal Processor Data Manual PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not
|
Original
|
TMS320C6678
SPRS691C
TMS320C6678
SPRS691C--February
TMS320C6678ACYP
TMS320C6678CYP
TMS320C6678XCYP
TMS320C6678CYPA
TMS320C6678XCYPA
|
PDF
|
DFSDM
Abstract: SAM9M10 K 2141 AC97 ARM926EJ-S AT91SAM ISO7816 NBC 3111 hc 541 rfid reader id-20
Text: Features • 400 MHz ARM926EJ-S ARM Thumb® Processor – 32 KBytes Data Cache, 32 KBytes Instruction Cache, MMU • Memories • • • • – DDR2 Controller 4-bank DDR2/LPDDR, SDR/LPSDR – External Bus Interface supporting 4-bank DDR2/LPDDR, SDR/LPSDR, Static
|
Original
|
ARM926EJ-STM
64-KByte
6355C
19-Apr-11
DFSDM
SAM9M10
K 2141
AC97
ARM926EJ-S
AT91SAM
ISO7816
NBC 3111
hc 541
rfid reader id-20
|
PDF
|
eeprom 2408
Abstract: BUT24
Text: TAS3103 Digital Audio Processor With 3D Effects Data Manual October 2002 Digital Audio Solutions SLES038A IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries TI reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue
|
Original
|
TAS3103
SLES038A
4073252/E
MO-153
eeprom 2408
BUT24
|
PDF
|
Untitled
Abstract: No abstract text available
Text: AM5K2E04, AM5K2E02 SPRS864B—June 2013—Revised January 2014 Multicore ARM KeyStone II System-on-Chip SoC 1 AM5K2E04/02 Features and Description • ARM Cortex -A15 MPCore™ CorePac – Up to Four ARM Cortex-A15 Processor Cores at up to 1.4-GHz – 4MB L2 Cache Memory Shared by all Cortex-A15
|
Original
|
AM5K2E04,
AM5K2E02
SPRS864Bâ
AM5K2E04/02
Cortex-A15
Cortex-A15
|
PDF
|
BUT24
Abstract: No abstract text available
Text: TAS3103 Digital Audio Processor With 3D Effects Data Manual February 2004 Digital Audio Solutions SLES038C IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries TI reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue
|
Original
|
TAS3103
SLES038C
BUT24
|
PDF
|
Untitled
Abstract: No abstract text available
Text: AM5K2E04, AM5K2E02 SPRS864B—June 2013—Revised January 2014 Multicore ARM KeyStone II System-on-Chip SoC 1 AM5K2E04/02 Features and Description • ARM Cortex -A15 MPCore™ CorePac – Up to Four ARM Cortex-A15 Processor Cores at up to 1.4-GHz – 4MB L2 Cache Memory Shared by all Cortex-A15
|
Original
|
AM5K2E04,
AM5K2E02
SPRS864Bâ
AM5K2E04/02
Cortex-A15
Cortex-A15
|
PDF
|
TMS320TCI6608
Abstract: SPRS623A SPRS623B
Text: TMS320TCI6608 Multicore Fixed and Floating-Point Digital Signal Processor Data Manual PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not
|
Original
|
TMS320TCI6608
SPRS623B
TMS320TCI6608
SPRS623B--August
SPRS623A
|
PDF
|
SPRS836D
Abstract: No abstract text available
Text: TCI6638K2K SPRS836D—February 2012—Revised October 2013 Multicore DSP+ARM KeyStone II System-on-Chip SoC 1 TCI6638K2K Features and Description 1.1 Features • Eight TMS320C66x DSP Core Subsystems (C66x CorePacs), Each With – 1.0 GHz or 1.2 GHz C66x Fixed/Floating-Point DSP Core
|
Original
|
TCI6638K2K
SPRS836Dâ
TCI6638K2K
TMS320C66xâ
1024K
SPRS836D
|
PDF
|
Untitled
Abstract: No abstract text available
Text: AM5K2E04/02 Multicore ARM KeyStone II System-on-Chip SoC Data Manual PRODUCT PREVIEW information applies to products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products
|
Original
|
AM5K2E04/02
SPRS864A
SPRS864Aâ
|
PDF
|
Untitled
Abstract: No abstract text available
Text: Freescale Semiconductor Application Note Document Number: AN4547 Rev. 0, 10/2012 Secure Boot on i.MX25, i.MX35, and i.MX51 using HABv3 by Freescale Semiconductor, Inc. This application note explains how to perform a secure boot on i.MX applications processors that support High
|
Original
|
AN4547
ARM11,
|
PDF
|
Untitled
Abstract: No abstract text available
Text: 66AK2H12/06 Multicore DSP+ARM KeyStone II System-on-Chip SoC Data Manual PRODUCT PREVIEW information applies to products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products
|
Original
|
66AK2H12/06
SPRS866B
SPRS866Bâ
|
PDF
|
|
232cbe
Abstract: WJ-A35 GT-64010A R5000 GT64010
Text: Galileo Technology TM System Controller with GT-64010A Preliminary PCI Interface for R4XXX/ Revision 1.1 December 1996 R5000 Family CPUs NOTE: Always contact Galileo Technology for possible updates before starting a design. FEATURES • Integrated system controller with PCI bus interface for
|
Original
|
GT-64010A
R5000
R4600/4650/4700/R5000
50MHz
64-bit
256KB
512KB
GT-64012
R4600/R4700)
512MB
232cbe
WJ-A35
GT-64010A
GT64010
|
PDF
|
C8051F226
Abstract: C8051F221 F206 C8051F206 C8051F220 c8015
Text: C8051F206 C8051F220/1/6 C8051F230/1/6 Mixed-Signal 8KB ISP FLASH MCU Family - On-Chip Debug Circuitry Facilitates Full Speed, Nonintrusive In-system Debug No Emulator Required! Provides Breakpoints, Single-Stepping, Watchpoints, Stack Monitor Inspect/Modify Memory and Registers
|
Original
|
C8051F206
C8051F220/1/6
C8051F230/1/6
F206/226/236)
16-Bit
CIP-51
MCS-51
B-100
C8051F226
C8051F221
F206
C8051F206
C8051F220
c8015
|
PDF
|
k 1535
Abstract: 0x0818-0x0819 TNETX3110 TNETX3151 TNETX3190 TNETX3270 0x046A
Text: TNETX3270 Programmer’s Reference Guide SPAU002A March 1999 Printed on Recycled Paper IMPORTANT NOTICE Texas Instruments and its subsidiaries TI reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest
|
Original
|
TNETX3270
SPAU002A
TNETX3270
k 1535
0x0818-0x0819
TNETX3110
TNETX3151
TNETX3190
0x046A
|
PDF
|
ATMEL 910
Abstract: atmel910 SMC911 hsb 772 p interface bluetooth with AVR ptz decoder AC97 AT32AP7000 AVR32 rf mems switch
Text: Features • High Performance, Low Power AVR 32 32-Bit Microcontroller • • • • • • • • • • • • • • • • • • • – 210 DMIPS throughput at 150 MHz – 16 KB instruction cache and 16 KB data caches – Memory Management Unit enabling use of operating systems
|
Original
|
32-Bit
32KBytes
32003H
AVR32
ATMEL 910
atmel910
SMC911
hsb 772 p
interface bluetooth with AVR
ptz decoder
AC97
AT32AP7000
rf mems switch
|
PDF
|
16Cxx
Abstract: p16c FP24.A16 P16CR84 75419 AN575 IEEE754 PIC16 PIC17 GA 88
Text: M AN575 IEEE 754 Compliant Floating Point Routines Author: Frank J. Testa FJT Consulting INTRODUCTION This application note presents an implementation of the following floating point math routines for the PICmicro microcontroller families: • • • •
|
Original
|
AN575
16Cxx
p16c
FP24.A16
P16CR84
75419
AN575
IEEE754
PIC16
PIC17
GA 88
|
PDF
|
SPRS691C
Abstract: No abstract text available
Text: TMS320C6678 Multicore Fixed and Floating-Point Digital Signal Processor Data Manual PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not
|
Original
|
TMS320C6678
SPRS691C
SPRS691Câ
SPRS691C
|
PDF
|
Untitled
Abstract: No abstract text available
Text: ML5805 ML5805 5.8GHz Variable Data Rate FSK Transceiver with Integrated PA 5.8GHZ VARIABLE DATA RATE FSK TRANSCEIVER WITH INTEGRATED PA NOT FOR NEW DESIGNS Package: 40 QFN, 6mmx6mm RX Subsystem IF Subsystem DATASEL F To V RXIN, RXIP 5.8GHz Input SI GN S
|
Original
|
ML5805
21dBm
048Mbps)
DS120607
MO-220
|
PDF
|
6242E
Abstract: 4583 dual schmitt trigger 6242b la 4508 ic pin diagram R1100D121C AT91Bootstrap CS 5609 ARM926EJ-S ISO7816 5609 dec
Text: Features • Incorporates the ARM926EJ-S ARM Thumb® Processor • • • • • • • • • • – DSP Instruction Extensions – ARM Jazelle® Technology for Java® Acceleration – 16 Kbyte Data Cache, 16 Kbyte Instruction Cache, Write Buffer
|
Original
|
ARM926EJ-STM
16-bits
6242E
11-Sep09
4583 dual schmitt trigger
6242b
la 4508 ic pin diagram
R1100D121C
AT91Bootstrap
CS 5609
ARM926EJ-S
ISO7816
5609 dec
|
PDF
|
MIPS R7000
Abstract: No abstract text available
Text: .«llfek. Product Preview Revision 1.3 FEB 8, 1999 G T -64120 i j a l i l e a System Controller For RC4650/4700/ 5000 and RM526X/527X/7000 CPUs P lease con ta ct G alileo Technology fo r possib le updates before finalizing a design. FEATURES • • Integrated system controller with PCI Interface for
|
OCR Scan
|
RC4650/4700/
RM526X/527X/7000
64-bit
RM7000
RC4650
RC5000
R5000
32-bit
24-bit
MIPS R7000
|
PDF
|
Untitled
Abstract: No abstract text available
Text: GT-64060 IBBIBk « Galileo !»; Technology High-lntegration PCI Bridge/ Memory Controller P roduct Preview R evision 0.7 4/1/97 Please contact Galileo Technology for possible updates before finalizing a design. FEATURES • High-integration PCI bridge/memory controller with
|
OCR Scan
|
GT-64060
32-bit
50MHz
150Mbytes/sec
512MB
256KB-16MB
R2000/3000
|
PDF
|