diode t25 4 j5
Abstract: DIODE T25 4 Jo DD1307 2SK512 Hitachi Scans-001
Text: 44^505 2SK512 001307b fibfl • HIT4 HITACHI / OPTOELECTRONICS blE SILIC O N N -C H A N N E L M O S FET HIGH SPEED POWER SWITCHING ■ FEATURES • Low On-Resistance. (/i„„= 0 .5 5 il) • High Speed Switching. • High Voltage ( V oiJ= 5 0 0 V ) •
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001307b
diode t25 4 j5
DIODE T25 4 Jo
DD1307
2SK512
Hitachi Scans-001
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Untitled
Abstract: No abstract text available
Text: ADVANCE M ld C a a iM I MT2D T 132 B, MT4D232 B, MT8D432 B 2, 4 MEG X 32 BURST EDO DRAM MODULES 1, BURST EDO DRAM MODULE 1,2,4 MEG x 32 4, 8, 16 MEGABYTE, 5V, BURST EDO FEATURES • 72-pin, single-in-lihe memory module (SIMM) • Burst EDO order, interleave or linear, programmed by
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MT4D232
MT8D432
72-pin,
024-cycle
048-cycle
P199S.
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732 LEM
Abstract: lem 718 T7352
Text: Data Sheet January 1994 % A H s .T ^ ^ ^ M ic ro e le c tro n ic s T7351B FDDI/T7352 TPDDI Physical Layer Devices Features Description • Single-chip FDDI physical layer PHY solution TheT7351B FDDI/T7352 TPDDI Physical Layer Devices are single VLSI components that implement
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T7351B
FDDI/T7352
T7352
inform32
DS93-180LAN
DS93-067LAN)
005002b
732 LEM
lem 718
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Untitled
Abstract: No abstract text available
Text: ss S G S-THOHSON D I E 81C 19241 J> I I ' i S ' i S l ? 0 0 1 3 0 7 0 0 T - 1 5 - ^ 5 - 0 5 r~~— S L I a • i im i. g ;y g :v a « a ; a g ì PRELIMINARY DATA AN AT&T PRODUCT QUAD LINE DRIVER • M EETS EIA RS-422A REQ UIREM ENTS • PROPAGATION DELAY IS LESS THAN 20 ns
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RS-422A
LB1023
LB1022A
mnol-810
T-15-4S-
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83C795
Abstract: No abstract text available
Text: 83C795 GENERAL DESCRIPTION 1.0 GENERAL DESCRIPTION 2.0 The SMC 83C795 Ethernet System Controller implements the IE EE 802.3 protocol for networks such as Ethernet, Cheaper net, a x i l OBas eT. Itis a highly i ntegated device that s hri nks theessenceof aLAN adapter cardontoasincjepeceofsilioon. It
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83C795
83C795
10BASE-T
83C795,
16-bit
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TNY 180
Abstract: tny 245 ANALOG SWITCH SPST cmca v2.1
Text: 19-0484; flev I; 5/96 - Genera! Description The DG200A is a dual, normally closed, single-pole* single-throw SPST analog switch. This CMOS switch can be operated with power supplies ranging from ±4.5V to ±18V. The DG200A has guaranteed oreakbefore-make switching. Its maximum turn-off time is
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19-04S4;
DG200A
500ns,
100ns.
DD13D7Ã
TNY 180
tny 245
ANALOG SWITCH SPST
cmca v2.1
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74HCT Logic Family Specification
Abstract: S5014
Text: GO UL D 4DE D INC/ GO U L D A M I •> GOULD AMI ■ M G S S ^ l b 0 G 1 3 Ü S 4 1 ■ AMI 12-Blt, 7 /^s SelfCalibrating A/D Converter a Semiconductors S5012 Features General Description • Monolithic CMOS A/D converter Microprocessor Compatible Parallel and Serial Output
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12-Blt,
S5012
12-Bit
S5014/S5016
CS5012
S5012
74HCT Logic Family Specification
S5014
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planar trans
Abstract: L64811 VA1112 l64863
Text: LSI LOGIC SBGHÖQM ÜÜ13GS3 ÖT3 miLC L 64860 E rror C orrectin g M em ory C on troller EMC T echnical M anual * mm* e * &’ à & 5 3 0 4 6 0 4 0 0 1 3 0 5 4 73T LLC LSI Logic has derived the material in this manual, which describes the L64860 Error Correcting Memory Controller, from documents provided by Sun Micro
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13GS3
L64860
SparKIT-40/SS10
D-102
planar trans
L64811
VA1112
l64863
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