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    SSTU32866EC,518 datasheet Part Img

    • NXP Semiconductors
    • 1.8 V 25-bit 1:1 or 14-bit 1:2 configurable registered buffer with parity for DDR2 RDIMM applications - Application: DDR2 400-533 Registered DIMMs ; Features: Parity checking ; Hold time (CLK-DATA): 0.75 ns; Inputs: 14 (1:2) or 25 (1:1) x SSTL_18 ; Operating frequency: 0~270 MHz; Operating temperature: 0~+70 Cel; Outputs: 25 (1:1) or 28 (1:2) x SSTL_18 ; Propagation delay: 1.4~1.8 ns; Set-up time (DATA-CLK): 0.2 ns; Supply voltage: 1.7~1.9 V; Package: SOT536-1 (LFBGA96); Container: Tape reel smd
    • Original
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    SSTU32866EC,518 datasheet preview Download Datasheet

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