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    DSA00176322.pdf

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    • A Deep Trench Isolation integrated in a 0.13um BiCD process technology for analog power ICs. H. Kitahara, T. Tsukihara, M. Sakai, J. Morioka*, K. Deguchi*, K. Yonemura*, T. Kikuchi**, S. Onoue**, K
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    0.18um LDMOS 0.35Um 0.35uM STI 0.6 um cmos process 7to30V BCD8* riccardi BiCD 0.13 BiCD-0 LBC7 RONA

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