DSAE0052481.pdf

Manufacturer Cypress Semiconductor
Partial File Text PRELIMINARY CY7C4261 CY7C4271 16K/32K x 9 Synchronous FIFOs Features D D D When WEN1 is LOW and WEN2/LD is HIGH, data is written into the FIFO on the rising edge of the WCLK signal.
Datasheet Type Original
ECAD Model
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