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DSAUD0068837.pdf
Manufacturer
Cypress Semiconductor
Partial File Text
CY3130 Warp3® VHDL and Verilog Development System for CPLDs -- Schematic capture (ViewDraw®) -- VHDL source-level simulator (SpeedWave®) Schematic Capture VHDL SIMULATION · Sophis
Type
Original
ECAD Model
Part Details
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