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DSAIHSC000145180.pdf
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3.3V CMOS 20-BIT TRANSPARENT LATCH WITH 3STATE OUTPUTS, 5 VOLT TOLERANT I/O FEATURES: - DESCRIPTION: Typical tsK(o) (Output Skew) < 250ps ESD > 2000V per MIL-STD-883, Method 3015; > 200V u
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Scan
ECAD Model
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