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DSAUTAZ0011346.pdf
Manufacturer
Mitel Semiconductor
Partial File Text
Verilog Design Flow Composer Schematics Schematics Verilog SystemBuilder PMG PMG PMG models Megacells RAM/ROM models Any Verilog Compliant simulator Behavioural Simulation Synops
Type
Original
ECAD Model
Part Details
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Gate level simulation without timing