DSA2IH0072323.pdf

Manufacturer Not Available
Partial File Text High-Density Symmetrically-Blocked Architecture -- Sixteen 64-Kbyte Blocks Extended Cycling Capability -- 100,000 Block Erase Cycles -- 1.6 Million Block Erase Cycles per Chip n Automated Byte Write
Type Scan
ECAD Model

DSA2IH0072323.pdf preview Download Datasheet