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DSA00332112.pdf
Manufacturer
National Semiconductor
Partial File Text
74F113 Dual JK Negative Edge-Triggered Flip-Flop General Description The 'F113 offers individual J K Set and Clock inputs When the clock goes HIGH the inputs are enabled and data may be entered T
Datasheet Type
Original
ECAD Model
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User Tagged Keywords
74F113
74F113PC
74F113SC
74F113SJ
device code F113