74HC4059D,112 datasheet
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NXP Semiconductors
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programmable divide-by-n counter - Description: Programmable Divide-By-N Counter ; F<sub>max</sub>: 43 MHz; Logic switching levels: CMOS ; Number of pins: 24 ; Output drive capability: +/- 5.2 mA ; Power dissipation considerations: Low Power or Battery Applications ; Propagation delay: 17@5V ns; Voltage: 2.0-6.0 V; Package: SOT137-1 (SO24); Container: Bulk Pack
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