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DSA00165531.pdf
Manufacturer
Cypress Semiconductor
Partial File Text
PRELIMINARY CY7C1248V18 CY7C1250V18 36-Mbit DDR-II+ SRAM 2-Word Burst Architecture (2.0 Cycle Read Latency) Features 36-Mbit density (2M x 18, 1M x 36) 300 MHz to 375 MHz clock for high bandwi
Type
Original
ECAD Model
Part Details
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CY7C1248V18-BWS0
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