The Datasheet Archive
Please enter a valid full or partial manufacturer part number with a minimum of 3 letters or numbers
Search
DSA00935312.pdf
Manufacturer
Zarlink Semiconductor
Partial File Text
ZL30110 Telecom Rate Conversion DPLL Data Sheet Features · · Synchronizes to 8 kHz, 2.048 MHz, 8.192 MHz or 16.384 MHz Provides a range of output clocks: · · · 65.536 MHz TDM clock locked to the inp
Type
Original
ECAD Model
Part Details
Price & Stock Powered by
Findchips
DSA00935312.pdf preview
Download Datasheet
User Tagged Keywords
C25co
tC100L
ZL30110LDE1