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DSAUTAZ0017415.pdf
Manufacturer
Xilinx
Partial File Text
0 R XC9500 In-System Programmable CPLD Family 0 1* February 10, 1999 (Version 4.0) Features ยท High-performance - 5 ns pin-to-pin logic delays on all pins - fCNT to 125 MHz Large density
Type
Original
ECAD Model
Part Details
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PLCC-48 footprint
X5880
X5902
XC9500 pinout