DSA2IH0015226.pdf

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Partial File Text 3 2 K x 8 Fast S R A M Features A Logic Block Diagram High Performance CMOS: tAA=10-35 ns Fast OE access: t0 E=3-8 ns Low power - 660 m W @ 100 MHz 11 mW @ 10 MHz standby - 2.75 mW @ 10 MH
Type Scan

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