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    DSA2IH00208867.pdf

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    • SN54HC195, SN74HC195 4 BIT PARALLEL ACCESS SHIFT REGISTERS D 2 6 8 4 , DECEMBER 1 9 8 2 -R E V IS E D JUNE 1989 · · · · · Synchronous Parallel Load Positive-Edge-Triggered Clocking J and K Inpu
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