DSA00261708.pdf by Integrated Silicon Solution

Partial File Text 36 Mb (1M x 36 & 2M x 18) DDR-II (Burst of 2) CIO Synchronous SRAMs . ISSI ® May 2005 Features · 1M x 36 or 2M x 18. · On-chip delay-locked loop (DLL) for wide data valid window. · C
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IS61DDB21M36 IS61DDB22M18

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