DSA0013383.pdf
by Cypress Semiconductor
-
CY7C1339G
PRELIMINARY
4-Mbit (128K x 32) Pipelined Sync SRAM
Functional Description[1]
Features
· Registered inputs and outputs for pipelined operation
· 128K × 32 common I/O architecture
-
Original
-
Unknown
-
Unknown
-
Unknown
-