DSA0064845.pdf by Analog Devices

Partial File Text a KEY FEATURES 500 MHz, 2.0 ns instruction cycle rate 12M bits of internal--on-chip--DRAM memory 25 mm × 25 mm (576-ball) thermally enhanced ball grid array package Dual-computation blocks--each con
Datasheet Type Original
RoHS Unknown
Pb Free Unknown
Lifecycle Unknown
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