DSAAQ0023893.pdf by Cypress Semiconductor

Partial File Text 36-Mbit QDR II+ SRAM 4-Word Burst Architecture (2.0 Cycle Read Latency) 36-Mbit QDR® II+ SRAM 4-Word Burst Architecture (2.0 Cycle Read Latency) CY7C1241KV18, CY7C1256KV18 CY7C1243KV18, CY7C1245KV
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Pb Free Unknown
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3M Touch Systems CY7C1245KV18-400BZXI