DASF0050523.pdf by Cypress Semiconductor

Partial File Text CY7C1512V18 CY7C1514V18 72 Mbit QDR® II SRAM Two Word Burst Architecture Features Functional Description Separate independent read and write data ports Supports concurrent transactio
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CY7C1510V18 CY7C1512V18 CY7C1514V18

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