DSAH00525380.pdf by Samsung Electronics

Partial File Text 256Mb Key Features · Double-data-rate architecture; two data transfers per clock cycle · Bidirectional data strobe(DQS) · Four banks operation · Differential clock inputs(CK and CK) · DLL aligns DQ
Datasheet Type Original
RoHS Unknown
Pb Free Unknown
Lifecycle Unknown
Price & Stock Find it at Findchips.com

DSAH00525380.pdf preview Download Datasheet