DSA00145013.pdf by Texas Instruments

Partial File Text GS30 0.15-µm CMOS Standard Cell/Gate Array Version 1.0 February, 2001 Copyright Texas Instruments Incorporated, 2001 The information and/or drawings set forth in this document and all rights in
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ARM dual port SRAM compiler DesignWare SPI LogicVision NEC-V850 synopsys on-chip modeling uart verilog lvds verilog for SRAM 512k word 16bit vhdl code for watchdog timer of ATM