DSAAQ0036450.pdf by Atmel

Partial File Text Features · Core ARM® Cortex®-M4 with a 2Kbytes cache running at up to 120 MHz Memory Protection Unit (MPU) DSP Instruction Set Thumb®-2 instruction set Pin-to-pin compatible with SAM3N, SAM3
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0X00400000 ARM Cortex M4 ATSAM4S16BA-AU atsam4s8ba-au ATSAM4SA16CA-AU ATSAM4SD32C cortex a9 specification QFN 88 SAM4S16 SAM4SD32 SAM4SD32C SD16 ADC wait mode sam4s