DSA003927.pdf
by Cypress Semiconductor
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fax id: 6148
PRELIMINARY
Ultra37256
UltraLogicTM 256-Macrocell ISRTM CPLD
Features
-- tS = 4.5 ns
-- tCO = 5.0 ns
Product-term clocking
IEEE1149.1 JTAG boundary scan
Programmable slew
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Original
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Unknown
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Unknown
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Unknown
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