DSA00302165.pdf by Cypress Semiconductor

Partial File Text CY7C1353G PRELIMINARY 4-Mbit (256K x 18) Flow-through SRAM with NoBLTM Architecture Functional Description[1] Features · Can support up to 133-MHz bus operations with zero wait states --
Datasheet Type Original
RoHS Unknown
Pb Free Unknown
Lifecycle Unknown
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CY7C1353G CY7C1353G-100AXC CY7C1353G-100AXI CY7C1353G-117AXC CY7C1353G-133AXC CY7C1353G-133AXI

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