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CY7C1362C-200AXC
datasheet
by Cypress Semiconductor
Description
9-Mbit (256K x 36/512K x 18) Pipelined SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 9 Mb; Organization: 512Kb x 18; Vcc (V): 3.1 to 3.6 V
Datasheet Type
Original
RoHS
Yes
Pb Free
Unknown
Lifecycle
Obsolete
Price & Stock
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CY7C1362C-200AXC
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