DSA00164090.pdf
by Cypress Semiconductor
-
PRELIMINARY
CY7C1410AV18 CY7C1412AV18 CY7C1414AV18
36-Mbit QDR-IITM SRAM 2-Word Burst Architecture
Features
ยท Separate Independent Read and Write data ports -- Supports concurrent transactions
-
Original
-
Unknown
-
Unknown
-
Unknown
-