DSA00164222.pdf by Cypress Semiconductor

Partial File Text PRELIMINARY CY7C1392BV18 CY7C1393BV18 CY7C1394BV18 18-Mbit DDR-II SIO SRAM 2-Word Burst Architecture Features · 18-Mbit density (2M x 8, 2M x 9, 1M x 18,512K x 36) · 300-MHz clock for high ban
Datasheet Type Original
RoHS Unknown
Pb Free Unknown
Lifecycle Unknown
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