DSA00164890.pdf by Cypress Semiconductor

Partial File Text CY7C1316BV18 CY7C1916BV18 CY7C1318BV18 CY7C1320BV18 18-Mbit DDR-II SRAM 2-Word Burst Architecture Features · 18-Mbit density (2M x 8, 2M x 9, 1M x 18, 512K x 36) · 300-MHz clock for high bandwidt
Datasheet Type Original
RoHS Unknown
Pb Free Unknown
Lifecycle Unknown
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