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PRELIMINARY
CY7C1577V18 CY7C1568V18 CY7C1570V18
72-Mbit DDR-II+ SRAM 2-Word Burst Architecture (2.5 Cycle Read Latency)
Features
· 72-Mbit density (8M x 9, 4M x 18, 2M x 36) · 300 MHz to 400 M
