DSA00165041.pdf
- Cypress Semiconductor
- PRELIMINARY CY7C1276V18 CY7C1263V18 CY7C1265V18 36-Mbit QDRTM-II+ SRAM 4-Word Burst Architecture (2.5 Cycle Read Latency) Features ยท Separate Independent Read and Write data ports -- Supports
- Original
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