DSA00165546.pdf by Cypress Semiconductor
- PRELIMINARY CY7C1568V18 CY7C1570V18 72-Mbit DDR-II+ SRAM 2-Word Burst Architecture (2.5 Cycle Read Latency) Features 72-Mbit density (4M x 18, 2M x 36) 300 MHz to 400 MHz clock for high bandwi
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