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DSA00321377.pdf
by Fairchild Semiconductor
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Revised July 1999 74F113 Dual JK Negative Edge-Triggered Flip-Flop General Description The 74F113 offers individual J, K, Set and Clock inputs. When the clock goes HIGH the inputs are enabled a
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Pb Free
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User Tagged Keywords
74F113
74F113PC
74F113SC
74F113SJ
MS-001
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