DSAIHSC00038544.pdf by Not Available

Partial File Text QL3060 / QL3060R 60,000 Usable PLD Gate pASICÂ®3 FPGA Combining High Performance and High Density PRELIMINARY DATA ... 60,000 usable PLD gates, 316 I/O pins S High Performance and High Dens
Datasheet Type Scan
RoHS Unknown
Pb Free Unknown
Lifecycle Unknown

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