DSA0058209.pdf by Xilinx

Partial File Text 1 XC9572 In-System Programmable CPLD ® December 4, 1998 (Version 3.0) 1 1* Product Specification Features Power Management · · 7.5 ns pin-to-pin logic delays on all pin
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PQ100 XC9500 XC9572 XC9572 Family xc9572 tq100