DSAIH000135445.pdf by Not Available

Partial File Text CDC318A l-LINE TO 18-LINE CLOCK DRIVER WITH |2C CONTROL INTERFACE SC AS 614 - SE P TE M B E R 1998 High-Speed, Low-Skew 1-to-18 Clock Buffer for Synchronous DRAM (SDRAM) Clock Buffering Applicatio
Datasheet Type Scan
RoHS Unknown
Pb Free Unknown
Lifecycle Unknown

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