DSA00332244.pdf by National Semiconductor

Partial File Text 54LS114 Dual JK Negative Edge-Triggered Flip-Flop with Common Clocks and Clears General Description The 'LS114 features individual J K and set inputs and common clock and common clear inputs When
Datasheet Type Original
RoHS Unknown
Pb Free Unknown
Lifecycle Unknown
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54LS114 54LS114DMQB 54LS114FMQB 54LS114LMQB LS114

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