DSA00332266.pdf by National Semiconductor

Partial File Text 54LS113 Dual JK Edge-Triggered Flip-Flop General Description The 54LS113 offers individual J K Set and Clock inputs When the clock goes HIGH the inputs are enabled and data may be entered The log
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54LS113 54LS113DMQB 54LS113FMQB 54LS113LMQB