DSA00898345.pdf by Aeroflex

Partial File Text Standard Products UT6325 RadTol Eclipse FPGA Data Sheet September 2008 www.aeroflex.com/FPGA FEATURES 0.25m, five-layer metal, ViaLink epitaxial CMOS process for smallest die sizes One-time p
Datasheet Type Original
RoHS Unknown
Pb Free Unknown
Lifecycle Unknown
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